ISL88011IH546Z-TK データシートの表示（PDF） - Intersil
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ISL88011IH546Z-TK Datasheet PDF : 13 Pages
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ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
Electrical Specifications Over the recommended operating conditions unless otherwise specified, RPU = 10kΩ. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
RESET
VOL
Reset Output Voltage Low
VDD ≥ 3.3V, Sinking 0.5mA
0.05
0.40
V
VDD < 3.3V, Sinking 0.5mA
0.05
0.40
V
VOH
Reset Output Voltage High
VDD ≥ 3.3V, Sourcing 0.4mA
VDD-0.6 VDD-0.4
V
VDD < 3.3V, Sourcing 0.4mA
VDD-0.6 VDD-0.4
V
tRPD
VTH to Reset Asserted Delay
60
µs
tPOR
POR Timeout Delay
ISL88012, ISL88013, ISL88015
140
200
260
ms
ISL88011, ISL88014 with CPOR = OPEN 200
250
ms
CLOAD Load Capacitance on Reset Pins
5
pF
MANUAL RESET
VMR
MR Input Voltage
tMR
MR Minimum Pulse Width
WATCHDOG TIMER (Note 8)
0
100
mV
1
µs
Start tWDT Start-up Watchdog Timeout Period
tWDT
Normal Watchdog Timeout Period
tWDPS WDI Minimum Pulse Width
VIL
Watchdog Input Voltage Low
VIH
Watchdog Input Voltage High
IWDT
Watchdog Input Current
NOTES:
32
51
64
sec
1.0
1.6
2.0
sec
100
ns
0.85 x VDD
0.3 x VDD
V
V
100
nA
6. Applies to ISL88012.
7. Applies to ISL88014 and ISL88015.
8. Applies to ISL88013 and ISL88015.
Pin Description
RST
The push-pull RST output is set to VDD (HIGH) whenever 1)
the device is first powered up, 2) either VDD or the voltage on
VMON falls below their respective minimum voltage sense
levels, 3) MR is asserted or 4) the watchdog timeout expires.
RST/MR
This pin functions as both a reset output and a manual reset
input. The RST output functions identically to the
complementary RST output but is an open drain output that
is pulled to GND (LOW) when reset is asserted. The MR
input is an active-low debounced input to which a user can
connect a push-button to add manual reset capability or
drive with active low signal from a controller.
VDD
The VDD pin is the power supply terminal. It is monitored by
the ISL88011, ISL88012 and ISL88013. For these devices,
the voltage at this pin is compared against an internal
factory-programmed voltage trip point, VTHVDD. A reset is
first asserted when the device is initially powered up to
ensure that the power supply has stabilized. Thereafter,
reset is again asserted whenever VDD falls below VTHVDD.
The device is designed with hysteresis to help prevent
chattering due to noise.
VMON
The VMON pin on the ISL88012, ISL88014 and ISL88015 is
a monitored input voltage that is user-adjustable. The
voltage at this pin is compared against an internal 600mV
reference voltage (VTHVMON) and a reset is asserted
whenever the monitored voltage falls below this trip point.
WDI
The Watchdog Input takes an input from a microprocessor
and ensures that it periodically toggles the WDI pin,
otherwise the internal watchdog timer runs out and reset is
asserted. The internal Watchdog Timer is cleared whenever
the WDI input pin sees a rising or falling edge or the device
is manually reset.
CPOR
The CPOR input pin lets users increase the Power-On Reset
timeout delay (tPOR) by connecting a capacitor between
CPOR and ground. (See Figure 3)
7
FN8093.3
August 9, 2011
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