ISL9011IRJMZ データシートの表示（PDF） - Intersil

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ISL9011IRJMZ

Dual LDO with Low Noise, Low IQ, and High PSRR

Intersil 

ISL9011

PIN #

1

2

3

4

5, 7, 8

6

9

10

PIN

NAME

VIN

EN1

EN2

CBYP

NC

GND

VO2

VO1

Pin Description

TYPE

Analog I/O

Low Voltage Compatible

CMOS Input

Low Voltage Compatible

CMOS Input

Analog I/O

NC

Ground

Analog I/O

Analog I/O

Supply Voltage / LDO Input:

Connect a 1µF capacitor to GND.

LDO-1 Enable.

DESCRIPTION

LDO-2 Enable.

Reference Bypass Capacitor Pin:

Optionally connect capacitor of value 0.01µF to 1µF between this pin and GND to tune in the

desired noise and PSRR performance.

No Connection

GND is the connection to system ground. Connect to PCB Ground plane.

LDO-2 Output:

Connect capacitor of value 1µF to 10µF to GND (1µF recommended).

LDO-1 Output:

Connect capacitor of value 1µF to 10µF to GND (1µF recommended).

Typical Application

VIN (2.3-6.5V)

ON

Enable 1

OFF ON

Enable 2

OFF

C1 C2

ISL9011

1

VIN

10

VO1

2

EN1

9

VO2

3

EN2

4

CBYP

8

NC

7

NC

5

NC

6

GND

C3 C4

Vout 1

Vout 2

C1, C3, C4: 1µF X5R ceramic capacitor

C2: 0.1µF X5R ceramic capacitor

8

FN9219.4

June 21, 2006

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