ISL9012IRNNZ データシートの表示（PDF） - Intersil

部品番号

コンポーネント説明

メーカー

ISL9012IRNNZ

Dual LDO with Low Noise, Low IQ, and High PSRR

Intersil 

ISL9012

Electrical Specifications

Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature

range of the device as follows:

TA = -40°C to +85°C; VIN = (VO+0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1μF; CO = 1μF;

CBYP = 0.01μF; CPOR = 0.01μF (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNITS

DEVICE START-UP CHARACTERISTICS

Device Enable TIme

TEN Time from assertion of the ENx pin to when the output voltage

reaches 95% of the VO(nom)

250 500

μs

LDO Soft-start Ramp Rate

TSSR Slope of linear portion of LDO output voltage ramp during start-

up

30

60 μs/V

EN1, EN2 PIN CHARACTERISTICS

Input Low Voltage

Input High Voltage

Input Leakage Current

Pin Capacitance

POR PIN CHARACTERISTICS

VIL

VIH

IIL, IIH

CPIN

Informative

-0.3

0.5

V

1.4

VIN+0.3 V

0.1

μA

5

pF

POR Thresholds

POR Delay

POR Pin Output Low Voltage

POR Pin Internal Pull-Up

Resistance

VPOR+

VPOR-

TPLH

TPHL

VOL

RPOR

As a percentage of nominal output voltage

CPOR = 0.01μF

@IOL = 1.0mA

91

94

97

%

87

90

93

%

100 200 300 ms

25

μs

0.2

V

78 100 180

kΩ

NOTES:

3. Guaranteed by design and characterization.

4. VOx = 0.98 * VOx(NOM); Valid for VOx greater than 1.85V.

EN2

TEN

VPOR+

VO2

POR

tPLH

VPOR-

VPOR+

<tPHL

VPOR-

tPHL

FIGURE 1. TIMING PARAMETER DEFINITION

4

FN9220.2

May 8, 2006

Share Link: