ISPLSI1016EA-100LT44 データシートの表示（PDF） - Lattice Semiconductor
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ISPLSI1016EA-100LT44 Datasheet PDF : 13 Pages
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Maximum GRP Delay vs GLB Loads
4
Specifications ispLSI 1016EA
3
ispLSI 1016EA-100
ispLSI 1016EA-125
2
ispLSI 1016EA-200
1
1
4
8
GLB Load
16
NEW
R Power Consumption
GRP/GLB/1016EA
O Power consumption in the ispLSI 1016EA device de- used. Figure 4 shows the relationship between power
F pends on two primary factors: the speed at which the and operating speed.
device is operating and the number of Product Terms
5 S Figure 4. Typical Device Power Consumption vs fmax
4A N 150
ispLSI 1016EA
H IG 140
C S 130
A E 120
M D 110
isp 5V 100
90
E 80
US 0
50 100 150 200 250
fmax (MHz)
Notes: Configuration of four 16-bit counters
Typical current at 5V, 25°C
ICC can be estimated for the ispLSI 1016EA using the following equation:
ICC(mA) = 23 + (# of PTs * 0.52) + (# of nets * max freq * 0.004)
Where:
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of four GLB loads
on average exists and the device is filled with four 16-bit counters. These values are for estimates only. Since the
value of ICC is sensitive to operating conditions and the program in the device, the actual ICC should be verified.
0127/1016EA
10
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