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IW4011B データシートの表示(PDF) - Estek Electronics Co. Ltd

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IW4011B Datasheet PDF : 4 Pages
1 2 3 4
IW4011B
Description
The IW4011B NAND gates provide the system designer with direct implementation of the NAND function.
Features
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 at 18 V over full package-
temperature range 100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
14
1
SOP
14
14
1
DIP 14
Package
Logic Diagram
A
1
B
2
C
5
D
6
E
8
F
9
G 12
H
13
3J
4K
10
L
11 M
PIN 14 = VDD
PIN 7 = Vcc
Pin Assignment
A1
B
J
2
K3
C4
5
D6
Vcc 7
14 VDD
13 H
12 G
11 M
10 L
F
9E
BEIJING ESTEK ELECTRONICS CO.,LTD
1

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