K4S643232H-TCL50 データシートの表示（PDF） - Samsung
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K4S643232H-TCL50 Datasheet PDF : 12 Pages
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SDRAM 64Mb H-die (x32)
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C
Parameter
Symbol
Test Condition
CAS
Latency 50
Operating Current
(One Bank Active)
ICC1
Burst Length =1
tRC ≥ tRC(min), tCC ≥ tCC(min), Io = 0mA
3
140
2
Precharge Standby Current in ICC2P
power-down mode
ICC2PS
CKE ≤ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
Precharge Standby Current
in non power-down mode
ICC2N
ICC2NS
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Active Standby Current
in power-down mode
ICC3P
ICC3PS
CKE ≤ VIL(max), tCC = 10ns
CKE ≤ VIL(max), tCC = ∞
Active Standby Current
in non power-down mode
(One Bank Active)
ICC3N
ICC3NS
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Operating Current
(Burst Mode)
ICC4
Io = 0 mA, Page Burst
All bank Activated, tCCD = tCCD(min)
3
170
2
Refresh Current
ICC5
tRC ≥ tRC(min)
3
150
2
C
Self Refresh Current
ICC6
CKE ≤ 0.2V
L
Speed
55 60
140 130
110
2
2
12
7
4
4
40
35
160 150
120
150 140
120
2
450
Unit Note
70
130
mA
2
mA
mA
mA
mA
140
mA
2
120
mA
3
mA
4
uA
5
Notes : 1. Unless otherwise notes, Input level is CMOS(VIH/VIL=VDDQ/VSSQ) in LVTTL.
2. Measured with outputs open.
3. Refresh period is 64ms.
4. K4S643232H-TC
5. K4S643232H-TL
-9-
Rev. 1.4 August 2004
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