K9F1208D0A データシートの表示（PDF） - Samsung
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K9F1208D0A Datasheet PDF : 46 Pages
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K9F1208D0A K9F1216D0A
K9F1208U0A K9F1216U0A
FLASH MEMORY
Figure 1-2. K9F1216X0A (X16) FUNCTIONAL BLOCK DIAGRAM
VCC
VSS
A9 - A25
A0 - A7
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
5126M + 16M Bit
NAND Flash
ARRAY
(256 + 8)Word x 131072
Command
Command
Register
Page Register & S/A
Y-Gating
I/O Buffers & Latches
CE
Control Logic
RE
& High Voltage
WE
Generator
Global Buffers
Output
Driver
VCC/VCCQ
VSS
I/0 0
I/0 15
CLE ALE WP
Figure 2-2. K9F1216X0A (X16) ARRAY ORGANIZATION
1 Block =32 Pages
= (8K + 256) Word
128K Pages
(=4,096 Blocks)
Page Register
(=256 Words)
256Word
8 Word
1 Page = 264 Word
1 Block = 264 Word x 32 Pages
= (8K + 256) Word
1 Device = 264Words x 32Pages x 4096 Blocks
= 528 Mbits
16 bit
Page Register
256 Word
8 Word
I/O 0 ~ I/O 15
I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6
1st Cycle
A0
A1
A2
A3
A4
A5
A6
2nd Cycle A9
A10
A11
A12
A13
A14
A15
3rd Cycle A17
A18
A19
A20
A21
A22
A23
4th Cycle A25
L*
L*
L*
L*
L*
L*
NOTE : Column Address : Starting Address of the Register.
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
I/O 7
A7
A16
A24
L*
I/O8 to 15
L*
Column Address
L*
Row Address
(Page Address)
L*
L*
8
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