KA317MR データシートの表示（PDF） - Fairchild Semiconductor
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KA317MR Datasheet PDF : 8 Pages
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KA317M
Absolute Maximum Ratings
Parameter
Input Output Voltage Differential
Power Dissipation
Thermal Resistance Junction-Air
D-PAK (Note1,2)
Operating Junction Temperature Range
Storage Temperature Range
Symbol
VI - VO
PD
RθJA
Tj
TSTG
Value
40
Internally limited
100
0 ~ +125
-65 ~+125
Unit
V
W
°C/W
°C
°C
Electrical Characteristics
(VI-VO=5V, IO= 0.1A, 0°C ≤ TJ ≤ + 125°C, PDMAX = 7.5W, unless otherwise specified)
Parameter
Line Regulation (Note3)
Symbol
Rline
Load Regulation (Note3) Rload
Adjustment Pin Current
Adjustment Pin Current
Change
IADJ
∆IADJ
Reference Voltage
VREF
Temperature Stability
Minimum Load Current to
Maintain Regulation
STT
IL(MIN)
Maximum Output Current IO(MAX)
RMS Noise, % of VOUT
eN
Ripple Rejection
RR
Long-Term Stability
ST
Conditions
TA = +25°C, 3V ≤ VI −VO ≤ 40V
3V ≤ VI −VO ≤ 40V
TA =+ 25°C, 10mA ≤ IO ≤ 0.5A
VO ≤ 5V
VO ≥ 5V
10mA ≤ IO ≤ 0.5A
VO ≤ 5V
VO ≥ 5V
-
3V ≤ VI - VO ≤ 40V
10mA ≤ IO ≤ 0.5A, PD < PDMAX
3V < VI - VO < 40V
10mA ≤ IO ≤ 0.5A, PD < PDMAX
-
VI - VO = 40V
VI - VO ≤15V, PD < PDMAX
VI - VO = 40V
PD < PDMAX, TA =+ 25°C
TA = +25°C, 10Hz < f < 10KHz
VO = 10V, f = 120Hz
without CADJ
CADJ = 10uF (Note4)
TJ =+ 125°C, 1000Hours
Min.
-
-
Typ.
0.01
0.02
Max.
0.04
0.07
Unit
%/ V
-
5
25
mV
0.1 0.5
%/ VO
-
20 70
mV
0.3 1.5
%/ VO
-
50 100
uA
-
0.2 5
uA
1.20 1.25 1.30
-
0.7
-
-
3.5 10
0.5 0.9
-
0.15 0.25 -
- 0.003 -
V
%/ VO
mA
A
%/ VO
65
-
dB
66
80
-
0.3 1 %/1000Hrs
Note :
1. Thermal resistance test board
Size: 76.2mm * 114.3mm * 1.6mm(1S0P)
JEDEC standard: JESD51-3, JESD51-7
2. Assume no ambient airflow.
3. Load and Line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken
into account separately. Pulse testing with low duty cycle is used.
4. CADJ, when used, is connected between the adjustment pin and ground.
2
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