KS0068B-00 データシートの表示（PDF） - Samsung
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KS0068B-00 Datasheet PDF : 22 Pages
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KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN DESCRIPTION
PIN(No).
VDD(42)
VSS(GND) (27)
V1-V5(30-34)
INPUT/OUTPUT
Power
S1-S60
(1-26, 67-100)
C1-C16
(51-66)
OSC1, OSC2
(29) (28)
Output
Output
Input (OSC1)
Output (OSC2)
CLK1 (35)
Output
CLK2 (36)
M (37)
D (38)
NAME
DESCRIPTION
Operating Voltage for logical circuit (2.7V ~ 5.5V)
0V (GND)
Negative Supply Bias voltage level for LCD driving
Voltage
Segment output Segent signal output for LCD driving
Common output Common signal output for LCD driving
Oscillator
Data latch clock
Both pin connected to Rf resistor or ceramic
resonator for internal oscillator circuit. In case of
external frequency use only, the frequency is input
to OSC1 terminal.
Clock output terminal for the serially
transfered data to be latched to the driver.
Data shift clock
Alternated
signal for LCD
driver output
Display data
interface
Clock output terminal used when D terminal data
output shifts the inside of the driver.
The alternating signal to convert LCD
drive waveform to AC
Character pattern data, which is corresponding to
each common signal, is supplied to driver serially.
INTERFACE
Power
Supply
LCD
LCD
Resistor or
Ceramic
Resonator
KS0065B
or
KS0063B
High
Low
Selection
Non selection
E(41)
R/W(40)
Input
Enable
Read/W rite
Start enable signal to read or write the data
R/W signal input is used to select the read/write
mode
High
Low
Read mode
Write mode
MPU
RS (39)
Register select register selection input
High
Low
Data register
(for read and write)
Instruction register (for write),
Busy flag, address counter
(for read)
DB0-DB7
(43-50)
Input/Output
Data interface
Used for data transfer between the MPU and
KS0068. These terminals are for data bus with
bidirectional three-state.
Initial 4 bit (DB0-DB3) are not used during 4-bit
operation (DB7 can be used as a busy flag)
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