KS0107B データシートの表示（PDF） - Samsung

部品番号

コンポーネント説明

メーカー

KS0107B

64CH SEGMENT DRIVER FOR DOT MATRIX LCD

Samsung 

KS0108B

64CH SEGMENT DRIVER FOR DOT MATRIX LCD

OPERATING PRINCIPLES & METHODS

1. I/O Buffer

Input buffer controls the status between the enable and disable of chip. Unless the CS1B to CS3 is in active mode, Input or

output of data and instruction does not execute. Therefore internal state is not change. But RSTB and ADC can operate

regardless CS1B-CS3.

2. Input register

Input register is provided to interface with MPU which is different operating frequency. Input register stores the data tempor-

arily before writing it into display RAM.

When CS1B to CS3 are in the active mode, R/W and RS select the input register. The data from MPU is written into input

register. Then Writing it into display RAM. Data latched for falling of the E signal and write automatically into the display data

RAM by internal operation.

3. Output register

Output register stores the data temporarily from display data RAM when CS1B, CS2B, CS3 is in active mode and R/W and

RS=H, stored data in display data RAM is latched in output register. When CS1B to CS3 is in active mode and R/W=H, RS=L,

status data (busy check) can read out.

To read the contents of display data RAM, twice access of read instruction is needed. In first access, data in display data RAM

is latched into output register. In second access, MPU can read data which is latched. That is, to read the data in display data

RAM, it needs dummy read. But status read is not needed dummy read.

RS

R/W

L

L

H

H

L

H

Function

Instruction

Status read (busy check)

Data write (from input register to display data RAM)

Data read (from display data RAM to output register)

4. Reset

Reset can be initialized system by setting RSTB terminal at low level when turning power on, receiving instruction from MPU.

When RSTB becomes low, following procedure is occured.

1. Display off

2. Display start line register become set by 0.(Z-address 0)

While RSTB is low, any instruction except status read can be accepted. Reset status appers at DB4. After DB4 is low, any

instruction can be accepted.

The Conditions of power supply at initial power up are shown in table 1.

Table 1. Power Supply Initial Conditions

Item

Symbol

Min

Reset Time

Rise Time

tRS

1.0

tR

-

Typ

Max

Unit

-

-

us

-

200

ns

VDD

RSTB

4.5[V]

tRS

tR

0.7VDD

0.3VDD

Share Link: