KS9286B-L データシートの表示（PDF） - Samsung

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KS9286B-L

DIGITAL SIGNAL PROCESSOR for CDP

Samsung 

KS9286B/KS9286B-L

DIGITAL SIGNAL PROCESSOR for CDP

PIN DESCRIPTION (continued)

PIN NO SYMBOL IO

DESCRIPTION

61

XTALSEL

I

Mode Selection1 (H: 33.8688MHz, L: 16.9344MHz)

62

FOK

I

SERVO FOK Signal input terminal

63

CDROM

I

Mode Selection2 (H: CD-ROM, L: CDP)

64

SRAM

I

TEST input terminal (GND connection)

65

TEST1

I

TEST input terminal (GND connection)

66

EFMI

I

EFM signal input

67

ADATAI

I

Serial audio data input of 48 bit/Slot (MSB first)

68

/ISTAT

O

The internal status output

69

TRCNT

I

Tracking counter input signal

70

LOCK

O

Output signal of LKFS condition sampled PBFR/16 (if LKFS is "H", LOCK is "H",

if LKFS is sampled "L" at least 8 times by PBFR/16, LOCK is "L".)

71

PBFR

O

Write frame clock (Lock: 7.35KHz)

72

SMEF

O

LPF time constant control of the spindle servo error signal

73

SMON

O

ON/OFF control signal for spindle servo

74

DVDD2

-

Digital VDD2

75

SMDP

O

Spindle Motor drive (Rough control in the SPEED mode, Phase control in the PHASE

mode)

76

SMDS

O

Spindle Motor drive (Velocity control in the PHASE mode)

77

BCKI

I

Audio data bit clock input of 48 bit/Slot (2.1168MHz)

78

TESTV

I

TEST input terminal (GND connection)

79

DSPEED

I

TEST input terminal (VDD connection)

80

LRCHI

I

Channel clock input of 48 bit/Slot (44.1KHz)

6

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