TDA1546T データシートの表示（PDF） - Philips Electronics

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TDA1546T

Bitstream Continuous Calibration DAC with digital sound processing (BCC-DAC)

Philips Electronics 

Philips Semiconductors

Bitstream Continuous Calibration DAC with

digital sound processing (BCC-DAC)

Preliminary specification

TDA1546T

CONTENTS

1

1.1

1.2

1.3

1.3.1

1.3.2

1.3.3

2

3

4

5

6

7

7.1

7.2

7.3

7.3.1

7.3.2

7.3.3

7.3.3.1

7.3.3.2

7.3.3.3

7.3.3.4

7.3.3.5

7.3.3.6

7.3.3.7

7.3.3.8

7.3.3.9

7.3.3.10

7.3.3.11

7.3.3.12

7.3.3.13

7.3.3.14

7.3.3.15

7.3.3.16

7.3.3.17

7.3.3.18

7.3.3.19

7.3.3.20

7.3.3.21

FEATURES

Easy application

High performance

Digital sound processing features

Volume control features

Sound processing features

Sound monitor features

ORDERING INFORMATION

QUICK REFERENCE DATA

GENERAL DESCRIPTION

BLOCK DIAGRAM

PINNING

FUNCTIONAL DESCRIPTION

Clock generation and distribution

Power-on reset

Microprocessor interface

Address mode

Data transfer mode

Organization and programming of the internal

register file

Volume control register bits: BAL3 to BAL0 and

BAR3 to BAR0

Volume control register bits: VC7 to VC0 and

FT3 to FT0

Volume control register bit: MUTE

Volume control register bit: RUNFA

Sound monitor register bits: FP2 to FP0

Sound monitor register bits: OVER3 to OVER0

Sound monitor register bits: SIL3 to SIL0 and

SILT3 to SILT0

Sound monitor register bit SPOS

Sound processing register bit: DSS

Sound processing register bits: SCT3 to SCT0

Sound processing register bits: SCB3 to SCB0

Sound processing register bits: SCBB3 to

SCBB0

Sound processing register bits: DEMC1 and

DEMC0

Sound processing register bit: DSM

Miscellaneous register bits: ED3 to ED0

Miscellaneous register bits: EA2 to EA0

Miscellaneous register bits: INS1 and INS0

Miscellaneous register bits: PVIV1, PVIV0 and

PINM1, PINM0

Miscellaneous register bit: CLRM

Miscellaneous register bits: OUTS1 and

OUTS0

Miscellaneous register bit: LONLY

7.3.3.22

7.4

7.4.1

7.5

7.6

7.6.1

7.6.2

7.7

7.7.1

7.7.2

7.7.3

7.7.4

7.8

7.8.1

7.8.2

7.8.3

7.8.4

7.8.5

7.8.6

7.9

7.9.1

7.9.2

7.9.3

7.9.4

7.9.5

7.9.6

7.10

7.11

7.12

7.13

8

9

10

11

12

Miscellaneous register bits: FSO1, FSO0, TRI,

ACDT, DCDT, CLKIV, CLKON, DYC1 and

DYC0

Multiple format input interface

Synchronization

Normal-speed mode

Double-speed mode

Double-speed mode features

Low-power option using double-speed mode

Volume control features

Digital balance

Digital volume control with fade function

Digital soft-mute

Scaling and polarity of the digital up-sampling

filter

Sound processing related features

De-emphasis filter

Treble

Bass

Bass boost

Digital dynamic bass boost, digital loudness

and other dynamic applications of tone control

Digital speaker system mode

Sound monitor block

Spectrum analyzer

dB converter

Peak detection

Silence detection

Overload detection

Versatile outputs

Noise shaper

Continuous calibration digital-to-analog

converter

Operational amplifiers

Internal reference circuitry

LIMITING VALUES

THERMAL CHARACTERISTICS

QUALITY SPECIFICATION

CHARACTERISTICS

ANALOG CHARACTERISTICS

January 1995

2

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