SAA7205 データシートの表示（PDF） - Philips Electronics
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SAA7205 Datasheet PDF : 84 Pages
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Philips Semiconductors
MPEG-2 systems demultiplexer
Preliminary specification
SAA7205H
2 GENERAL DESCRIPTION
This document specifies the MPEG-2 systems demultiplexer IC, SAA7205H, for use in MPEG-2 based digital TV
receivers, possibly incorporating conditional access. Such receivers are to be implemented in, for instance, a Digital
Video Broadcasting (DVB) set-top box, or Integrated Receiver Decoder (IRD). An example of a
demultiplexer/descrambler system configuration, containing a channel decoder module, source decoders, a system
microcontroller and a conditional access system is shown in Fig.1. The main function of the demultiplexer is to separate
relevant data from an incoming MPEG-2 systems compliant data stream and pass it to both the individual source
decoders and to the system microcontroller. To support descrambling, the demultiplexer interfaces with the descrambler
part of a conditional access system (optional). The demultiplexer therefore generates a 9 MHz descrambler chip clock.
3 QUICK REFERENCE DATA
SYMBOL
VDDD
VDDD(core)
Ptot
fCLK
Tamb
PARAMETER
digital supply voltage
digital supply voltage for core
total power consumption
clock frequency
operating ambient temperature
CONDITIONS
fbyte ≤ 9 MHz
MIN.
4.5
3.0
−
−
0
TYP.
5.0
3.3
−
−
−
MAX.
5.5
3.6
380
27
70
UNIT
V
V
mW
MHz
°C
4 ORDERING INFORMATION
TYPE
NUMBER
SAA7205H
NAME
QFP128
PACKAGE
DESCRIPTION
plastic quad flat package; 128 leads (lead length 1.6 mm);
body 28 × 28 × 3.4 mm; high stand-off height
VERSION
SOT320-2
handbook, full pagewidth
CONDITIONAL
ACCESS
SYSTEM
MICROCONTROLLER
DEMODULATOR PLUS
FORWARD ERROR
CORRECTOR
(AND DESCRAMBLER)
SAA7205H
9 MHz DCLK
32K x 8
SRAM
AUDIO
SOURCE
DECODER
VIDEO
SOURCE
DECODER
TELETEXT
DECODER
MGG374
1997 Jan 21
Fig.1 Demultiplexer system configuration.
4
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