SAA7205 データシートの表示（PDF） - Philips Electronics

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SAA7205

MPEG-2 systems demultiplexer

Philips Electronics 

Philips Semiconductors

MPEG-2 systems demultiplexer

Preliminary specification

SAA7205H

SYMBOL

RAMA10

VDDD2(core)

MDAT0

MDAT1

MDAT2

MDAT3

MDAT4

MDAT5

MDAT6

MDAT7

VSSD2(core)

MA0

MA1

MA2

MA3

MA4

MA5

MA6

MA7

MA8

MA9

VDDD5

MA10

R/W

CSVID

CSDEM

IRQ

NMI

POR

VSEL

VSSD5

PKTSYNC

PKTDATV

PKTBAD/

PKTBAD

PKTDAT7

PKTDAT6

PKTDAT5

PKTDAT4

VSSD6

PKTDAT3

1997 Jan 21

PIN

I/O

DESCRIPTION

75

O external SRAM address bus output bit 10

76 supply digital supply voltage 2 for core (+3.3 V)

77

I/O microcontroller bidirectional data bus bit 0

78

I/O microcontroller bidirectional data bus bit 1

79

I/O microcontroller bidirectional data bus bit 2

80

I/O microcontroller bidirectional data bus bit 3

81

I/O microcontroller bidirectional data bus bit 4

82

I/O microcontroller bidirectional data bus bit 5

83

I/O microcontroller bidirectional data bus bit 6

84

I/O microcontroller bidirectional data bus bit 7

85

GND digital ground 2 for core

86

I microcontroller MSByte/LSByte indicator input bit 0

87

I microcontroller address/data indicator input bit 1

88

I microcontroller address input bit 2 for direct access to selected registers

89

I microcontroller address input bit 3 for direct access to selected registers

90

I microcontroller address input bit 4 for direct access to selected registers

91

I microcontroller address input bit 5 for direct access to selected registers

92

I microcontroller address input bit 6 for direct access to selected registers

93

I microcontroller address input bit 7 for direct access to selected registers

94

I microcontroller address input bit 8 for direct access to selected registers

95

I microcontroller address input bit 9 for direct access to selected registers

96 supply digital supply voltage 5 (+5 V)

97

I microcontroller direct addressing/indirect addressing indicator input bit 10

98

I read/write input selection

99

I (audio)/video decoder chip select input (active LOW)

100

I demultiplexer chip select input (active LOW)

101

O interrupt request output for microcontroller (active LOW, open-drain)

102

O non-maskable interrupt output for VOUT bus access handling (open-drain)

103

I power-on reset input

104

I video input select signal (bus control by microcontroller)

105 GND digital ground 5

106

I indicates the first input byte (sync) of a transport packet

107

I valid input data indicator

108

I packet error indicator input (programmable polarity)

109

I 8-bit wide modem data input bit 7

110

I 8-bit wide modem data input bit 6

111

I 8-bit wide modem data input bit 5

112

I 8-bit wide modem data input bit 4

113

GND digital ground 6

114

I 8-bit wide modem data input bit 3

8

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