KS8993 データシートの表示（PDF） - Micrel

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KS8993

3-Port 10/100 Integrated Switch with PHY and Frame Buffer

Micrel 

KS8993

Micrel

Revision History

Revision Date

Summary of Changes

1.00

04/13/00 Document origination

1.01

05/31/00 Miscellaneous changes

1.02

06/08/00 Index repair

1.03

09/20/00 MII forward correction.

MRXD[3:1] correction.

1.04

10/30/00 Update voltage ratings.

1.05

10/31/00 Correct I/O descriptions.

1.06

11/08/00 Correct mode operation for LED[1:3][0]

Add timing information

1.07

12/21/00 Correct pin information

1.08

03/23/01 Correct VLAN description.

1.09

03/26/01 Update MODESEL descriptions for packet size extensions

1.10

04/19/01 Update electrical characteristics; Correct I/O information.

1.11

04/20/01 Correct timing information

1.12

05/10/01 Update I/O descriptions

1.13

06/08/01 Define control for LED[3][3]

1.14

06/26/01 Revise definition for LED[3][3]

1.15

08/1/01

Update timing information and power dissipation

Add power up timing description; Correct DISAN3 default mode.

1.16

08/9/01

Correct LED [1] [1] to float configuration

Add Reverse and Forward MII timing

2.00

4/8/02

Correct reserve buffer from 128 to 96 for PRSV pin.

Add max. current.

Add force flow control Option as follows:

Change pin 50 from reserved to FFLOW1# for force flow control on port 1.)

Change pin 46 from reserved to FFLOW2# for force flow control on port 2.

Modify LED[1][2] for force flow control on port 3.

2.01

5/6/02

Add TX Disable for Port 1 and port 2, Power down for port 3 and Far end Fault Disable features using

MUX[1:2] and TEST[1:2] pins.

2.02

7/2/02

Recommend pull-down on LED[3][3]

2.03

8/29/03

Convert to new format.

2.04

1/24/05

Added reset circuit recommendation.

2.05

5/12/05

Added lead-free part number

May 2005

3

KS8993

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