L6206Q データシートの表示（PDF） - STMicroelectronics
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L6206Q Datasheet PDF : 27 Pages
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L6206Q
4
Circuit description
Circuit description
4.1
Power stages and charge pump
The L6206Q device integrates two independent Power MOS full bridges. Each power MOS
has an RDS(ON) = 0.3 (typical value at 25 °C) with intrinsic fast freewheeling diode. Cross
conduction protection is implemented by using a deadtime (tDT = 1 µs typical value) set by
an internal timing circuit between the turn-off and turn-on of two Power MOSFETs in one leg
of a bridge.
Pins VSA and VSB must be connected together to the supply voltage (VS).
Using an N-channel Power MOSFET for the upper transistors in the bridge requires a gate
drive voltage above the power supply voltage. The bootstrapped supply (VBOOT) is obtained
through an internal oscillator and few external components to realize a charge pump circuit,
as shown in Figure 5. The oscillator output (pin VCP) is a square wave at 600 kHz (typically)
with 10 V amplitude. Recommended values/part numbers for the charge pump circuit are
shown in Table 5.
Table 5. Charge pump external component values
Component
Value
CBOOT
CP
RP
D1
D2
220 nF
10 nF
100
1N4148
1N4148
Figure 5. Charge pump circuit
VS
D1
D2
CBOOT
RP
CP
VCP VBOOT
VSA VSB
AM02559v1
4.2
Logic inputs
Pins IN1A, IN2A, IN1B, IN2B, ENA, and ENB are TTL/CMOS and µC compatible logic inputs.
The internal structure is shown in Figure 6. The typical values for turn-on and turn-off
thresholds are respectively Vth(ON) = 1.8 V and Vth(OFF) = 1.3 V.
Pins ENA and ENB are commonly used to implement overcurrent and thermal protection by
connecting them respectively to the outputs OCDA and OCDB, which are open-drain
outputs. If this type of connection is chosen, particular care needs to be taken in driving
these pins. Two configurations are shown in Figure 7 and Figure 8. If driven by an open-
drain (collector) structure, a pull-up resistor REN and a capacitor CEN are connected as
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