L6566A(2007) データシートの表示（PDF） - STMicroelectronics
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L6566A Datasheet PDF : 51 Pages
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L6566A
List of figures
List of figures
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Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Typical system block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin connection (through top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Multi-mode operation with QR option active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
High-voltage start-up generator: internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Timing diagram: normal power-up and power-down sequences . . . . . . . . . . . . . . . . . . . . 19
Timing diagram showing short-circuit behavior (SS pin clamped at 5V). . . . . . . . . . . . . . . 20
Zero current detection block, triggering block, oscillator block and related logic . . . . . . . . 20
Drain ringing cycle skipping as the load is gradually reduced . . . . . . . . . . . . . . . . . . . . . . 21
Operation of ZCD, triggering and Oscillator blocks (QR option active). . . . . . . . . . . . . . . . 23
Load-dependent operating modes: timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Addition of an offset to the current sense lowers the burst-mode operation threshold . . . . 25
Adaptive UVLO block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Possible feedback configurations that can be used with the L6566A . . . . . . . . . . . . . . . . . 26
Externally controlled burst-mode operation by driving pin COMP: timing diagram. . . . . . . 27
Typical power capability change vs input voltage in QR flyback converters . . . . . . . . . . . 28
Left: Overcurrent setpoint vs. VFF voltage; right: Line Feedforward function block . . . . . . 29
Hiccup-mode OCP: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Possible interfaces between the L6566A and a PFC controller . . . . . . . . . . . . . . . . . . . . . 32
Operation after latched disable activation: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . 33
Soft-start pin operation under different operating conditions and settings . . . . . . . . . . . . . 34
OVP Function: internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
OVP function: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Maximum allowed duty cycle vs. switching frequency for correct OVP detection. . . . . . . . 37
Brownout protection: internal block diagram and timing diagram . . . . . . . . . . . . . . . . . . . . 38
Ac voltage sensing with the L6566A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Slope compensation waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Typical low-cost application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical full-feature application schematic (QR operation) . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical full-feature application schematic (FF operation) . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Frequency foldback at light load (FF operation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Latched shutdown upon mains overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
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