L6390 データシートの表示（PDF） - STMicroelectronics
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L6390 Datasheet PDF : 22 Pages
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Pin connection
2
Pin connection
Figure 2. Pin connection (top view)
LIN
1
SD/OD
2
HIN
3
VCC
4
DT
5
OP-
6
OPOUT
7
GND
8
16
BOOT
15
HVG
14
OUT
13
NC
12
NC
11
LVG
10
CP+
9
OP+
L6390
Table 2. Pin description
Pin n #
Pin name
Type
Function
1
2
3
4
5
6
7
8
9
10
11
12, 13
14
15
16
LIN
SD/OD (1)
HIN
VCC
DT
OP-
OPOUT
GND
OP+
CP+
LVG (1)
NC
OUT
HVG (1)
BOOT
I
Low side driver logic input (active low)
I/O
Shut down logic input (active low)/open drain
(comparator output)
I
High side driver logic input (active high)
P
Lower section supply voltage
I
Dead time setting
I
Opamp inverting input
O
Opamp output
P
Ground
I
Opamp non inverting input
I
Comparator input
O
Low side driver output
Not connected
P
High side (Floating) common voltage
O
High side driver output
P
Bootstrap supply voltage
1. The circuit provides less than 1 V on the LVG and HVG pins (@ Isink = 10 mA), with VCC > 3 V. This allows
omitting the "bleeder" resistor connected between the gate and the source of the external MOSFET
normally used to hold the pin low; the gate driver assures low impedance also in SD condition.
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