LB1825 データシートの表示（PDF） - SANYO -> Panasonic
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LB1825 Datasheet PDF : 9 Pages
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Pin Assignment
LB1825
Pin Functions
Pin No.
1
2 to 7
8 to 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 to 26
27
28
Symbol
FC
IN1+ to IN3+,
IN1– to IN3–
OUT1 to OUT3
Rf
VREG
Function
Frequency characteristics correction
Hall element inputs
Outputs
Output current detector
Stabilized power supply output
LD
Phase lock detector output
VCC
ERROUT
ERRIN
PD
VCS
GND
FGIN
FGOUT1
FGOUT2
S/B
N1 to N3
OSC
F/R
Power supply
Error amplifier output
Error amplifier input
Phase comparator output
Current limiter reference voltage generation
Ground
FG amplifier input
FG amplifier output
FG/Hall FG output
Brake command input
Reference frequency divisor switching
Crystal oscillator/external clock input
Forward/reverse switching
Clock Divisor Switching
Pin N1
Pin N2 Divisor (1)*I
Pin N3 Divisor (2)*I
L
L
*II
L
5
L
M
128
M
4
L
H
256
H
3
M
L
512
M
M
1024
M
H
2048
H
L
4096
H
M
8192
H
H
16384
Note: I. Total divisor = (divisor (1) × divisor (2))
PLL servo frequency = (crystal oscillator frequency)/(total divisor)
II. External clock mode
The PLL servo frequency = external input frequency
Notes
A capacitor must be inserted between pin 1 and ground.
Taken as high when IN+ > IN–, and as low otherwise.
A capacitor must be inserted between pin 11 and ground.
On when the phase is locked. This pin is an open-collector
output.
Also functions as the Hall FG switching pin.
The LB1825 goes to stop mode when pin 21 is set low.
This pin is an open-collector output.
Braking is applied when pin 23 is set high.
The clock divisor is set by the states of pins 24 to 26.
No. 4845-4/9
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