LC74731 データシートの表示（PDF） - SANYO -> Panasonic
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LC74731 Datasheet PDF : 38 Pages
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LC74731W,74732W
COMMAND3 (Display control setup command)
• First byte
DA0 to 7 Register
7
—
6
—
5
—
4
—
3
TSTMOD
2
RAMERS
1
OSCSTP
0
SYSRST
State
1
0
1
1
0
1
0
1
0
1
0
1
Content
Function
Command 3 identification code
Display character data write settings
Normal operating mode
Test mode
Erase display RAM (sets the data to FF (hexadecimal))
Do not stop the crystal and LC oscillator circuits.
Stop the crystal and LC oscillator circuits.
Reset all registers. This turns the display off.
• Second byte
DA0 to 7 Register
7
—
6
LCSOFF
5
XN53S
4
BLKSEL
3
LC
2
FS
1
BK
0
DSPON
State
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Content
Function
Second byte identification bit
Normal operation
LC oscillator STOP: Disabled
Normal
Switching
Character display area
Video display area
The LC oscillator is used as the dot clock.
The crystal oscillator is used as the dot clock.
Crystal oscillator frequency: 2 fsc
Crystal oscillator frequency: 4 fsc
Blinking period: 0.5 s
Blinking period: 1 s
Character display: off
Character display: on
Note that all registers are set to 0 when these ICs are reset by the RST pin.
Notes
This bit must always be 0.
The RAM erase operation takes about 500 µs. (It
must be executed in the DSPOFF state.)
This setting is valid in external synchronization
mode when character display is off.
The reset occurs when the CS pin is low, and is
cleared when CS is set high.
Notes
Switches the LC oscillator STOP control
Switches the crystal oscillator capability
Specifies the character size that fills the whole
character area.
Selects the dot clock used for character display in
the horizontal direction.
Sets the crystal oscillator frequency.
Switches the blinking period.
No. 6526-18/38
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