LCX005 データシートの表示（PDF） - Sony Semiconductor
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LCX005 Datasheet PDF : 22 Pages
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LCX005BK
Input Signals
1. Input signal voltage conditions (VSS = 0V)
Item
Symbol
Min.
Typ.
Max.
Unit
H driver input voltage
(HST, HCK1, HCK2, RGT)
(Low) VHIL
–0.35
0.0
+0.35
V
(High) VHIH
2.8
5.0
5.5
V
V driver input voltage
(Low) VVIL
–0.35
0.0
+0.35
V
(VST, VCK1, VCK2, CLR, EN)
(High) VVIH
2.8
5.0
5.5
V
Video signal center voltage
Video signal input range∗1
VVC
Vsig
5.8
6.0
6.2
V
VVC – 4.5
VVC + 4.5 V
Common voltage of panel
VCOM VVC – 0.55 VVC – 0.40 VVC – 0.25 V
∗1 Video input signal shall be symmetrical to VVC.
2. Clock timing conditions (Ta = 25°C, Input voltage = 5.0V)
Item
Symbol
Min.
Typ.
Max. Unit
Hst rise time
trHst
100
Hst fall time
HST
Hst data set-up time
tfHst
tdHst
100
–170
135
170
HCK
Hst data hold time
Hckn∗2 rise time
Hckn∗2 fall time
Hck1 fall to Hck2 rise time
Hck1 rise to Hck2 fall time
thHst
trHckn
tfHckn
to1Hck
to2Hck
–455
–135
–15
0
–15
0
–50
100
100
15
ns
15
Clr rise time
trClr
100
Clr fall time
CLR
Clr pulse width
tfClr
twClr
3400
3500
100
3600
Clr fall to Hst rise time
toHst
1100
1200
1300
Vst rise time
trVst
100
VST
VCK
Vst fall time
Vst data set-up time
Vst data hold time
Vckn∗2 rise time
Vckn∗2 fall time
Vck1 fall to Vck2 rise time
tfVst
tdVst
–50
32
thVst
–50
–32
trVckn
tfVckn
to1Vck
–100
0
100
50
µs
–20
100
100
100
Vck1 rise to Vck2 fall time
En rise time
to2Vck
–100
0
trEn
100
ns
100
En fall time
EN
Vck2 rise to En fall time
tfEn
100
tdVck2
–100
0
100
Vck1 rise to En rise time
tdVck1
–100
0
100
∗2 Hckn and Vckn mean Hck1, Hck2 and Vck1, Vck2. (fHckn = 1.84MHz, fVckn = 7.865kHz)
–6–
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