LPC47M172-NR データシートの表示（PDF） - SMSC -> Microchip
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LPC47M172-NR Datasheet PDF : 227 Pages
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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
7.25.14 Interrupts .......................................................................................................................................118
7.25.15 Memory Configurations .................................................................................................................118
7.25.16 Register Definitions .......................................................................................................................118
7.25.17 External Clock Signal ....................................................................................................................119
7.25.18 Default Reset Conditions ...............................................................................................................119
7.25.19 GateA20 and Keyboard Reset.......................................................................................................119
7.26 Port 92 Fast Gatea20 and Keyboard Reset..........................................................................................119
7.26.1 Port 92 Register.............................................................................................................................119
7.26.2 Keyboard and Mouse PME Generation .........................................................................................123
7.27 General Purpose I/O.............................................................................................................................124
7.27.1 GPIO Pins .....................................................................................................................................125
7.27.2 Description.....................................................................................................................................125
7.27.3 GPIO Control .................................................................................................................................126
7.27.4 GPIO Operation.............................................................................................................................127
7.27.5 GPIO PME Functionality................................................................................................................128
7.27.6 Either Edge Triggered Interrupts ...................................................................................................128
7.28 PME Support ........................................................................................................................................128
7.28.1 ‘Wake on Specific Key’ Option.......................................................................................................129
7.29 Fan Monitoring......................................................................................................................................130
7.29.1 Fan Tachometer Inputs .................................................................................................................131
7.29.2 Detection of a Stalled Fan .............................................................................................................131
7.30 Hard Drive and Power LED Logic .........................................................................................................132
7.30.1 Hard Drive Front Panel LED (Red) ................................................................................................132
7.30.2 Yellow and Green Power LED Pins ...............................................................................................133
7.31 Power Generation (5V) .........................................................................................................................134
7.31.1 Reference Pins ..............................................................................................................................134
7.31.2 5V Main Reference Generation .....................................................................................................135
7.31.3 5V Standby Reference Generation................................................................................................135
7.31.4 Reference Timings ........................................................................................................................136
7.32 IDE Reset Output Pin ...........................................................................................................................136
7.33 PCI Reset Output Pins..........................................................................................................................136
7.34 Voltage Translation Circuit....................................................................................................................137
7.35 SMBus Isolation Circuitry......................................................................................................................139
7.36 PS_ON Logic ........................................................................................................................................141
7.37 PWRGD_3V Logic ................................................................................................................................141
7.38 SCK_BJT_GATE Output ......................................................................................................................143
7.39 Backfeed Cut and Latched Backfeed Cut Circuitry ...............................................................................144
7.40 Resume Reset Logic ............................................................................................................................149
7.41 CNR Logic ............................................................................................................................................149
Chapter 8 Power Control Runtime Registers...................................................................................... 151
Chapter 9 GPIO Runtime Registers.................................................................................................... 158
Chapter 10 Runtime Register Block Runtime Registers ....................................................................... 162
Chapter 11 Configuration ...................................................................................................................... 173
11.1 System Elements..................................................................................................................................173
11.1.1 Primary Configuration Address Decoder .......................................................................................173
11.1.2 Entering the Configuration State....................................................................................................173
11.1.3 Exiting the Configuration State ......................................................................................................173
11.1.4 Configuration Sequence ................................................................................................................174
11.1.5 Enter Configuration Mode..............................................................................................................174
11.1.6 Configuration Mode .......................................................................................................................174
11.1.7 Exit Configuration Mode ................................................................................................................174
11.1.8 Programming Example ..................................................................................................................175
11.2 Chip Level (Global) Control/Configuration Registers[0x00-0x2F] .........................................................180
11.3 Logical Device Configuration/Control Registers [0x30-0xFF] ...............................................................183
11.4 Logical Device I/O Address ..................................................................................................................187
11.5 Logical Device Configuration Registers ................................................................................................190
Chapter 12 Electrical Characteristics .................................................................................................... 196
12.1 Maximum Guaranteed Ratings .............................................................................................................196
12.2 Operational DC Characteristics ............................................................................................................196
12.3 Standby Power Requirements ..............................................................................................................201
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
Page 7
DATASHEET
SMSC LPC47M172
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