LTC1799CS5-TRPBF データシートの表示（PDF） - Linear Technology
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LTC1799CS5-TRPBF Datasheet PDF : 4 Pages
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LTC1799
ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 2.7V to 5.5V, RL=5k, CL = 5pF, Pin 4 = V+ unless otherwise noted.
All voltages are with respect to GND.
SYMBOL PARAMETER
VOH
High Level Output Voltage
VOL
Low Level Output Voltage
tr
OUT Rise Time
(Note 5)
tf
OUT Fall Time
(Note 5)
CONDITIONS
V+ = 5V
V+ = 3V
V+ = 5V
V+ = 3V
V+ = 5V
V+ = 3V
V+ = 5V
V+ = 3V
IOH = – 1mA
IOH = – 4mA
IOH = – 1mA
IOH = – 4mA
IOL = 1mA
IOL = 4mA
IOL = 1mA
IOL = 4mA
Pin 4 = V+ or Floating, RL = 0
Pin 4 = 0V, RL = 0
Pin 4 = V+ or Floating, RL = 0
Pin 4 = 0V, RL = 0
Pin 4 = V+ or Floating, RL = 0
Pin 4 = 0V, RL = 0
Pin 4 = V+ or Floating, RL = 0
Pin 4 = 0V, RL = 0
MIN TYP MAX
q 4.8
4.95
q 4.5
4.8
q 2.7
2.9
q 2.2
2.6
q
0.05 0.15
q
0.2
0.4
q
0.1
0.3
q
0.4
0.7
14
7
19
11
13
6
19
10
UNITS
V
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Frequencies near 100kHz and 1MHz may be generated using two
different values of RSET (see the Table 1 in the Applications Information
section). For these frequencies, the error is specified under the following
assumption: 10k < RSET ≤ 100k.
Note 3: Frequency error (defined as the deviation from the fOSC equation)
includes drift over temperature and over supply.
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specification is based on characterization and
is not 100% tested.
Note 5: Output rise and fall times are measured between the 10% and
90% power supply levels. These specifications are based on
characterization.
PI FU CTIO S
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply
must be kept free from noise and ripple. It should be
bypassed directly to a ground plane.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V+ deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC1799 to approximately 1.1V below the V+
voltage. For best performance, use a precision metal film
resistor with a value between 10k and 200k and limit the
capacitance on this pin to less than 2pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the ÷1 setting, the highest frequency range.
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V+ for the ÷100 setting, the lowest
frequency range. To detect a floating DIV pin, the LTC1799
attempts to pull the pin toward midsupply. Therefore,
driving the DIV pin high requires sourcing approximately
5µA. Likewise, driving DIV low requires sinking 5µA.
When floated, the DIV pin will be held near midsupply by
these current sources. When it is floated, it is recom-
mended that the DIV pin be bypassed by a 1nF capacitor
or surrounded by a ground shield to prevent excessive
coupling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can easily drive
5kΩ or 10pF loads. Larger loads may cause inaccuracies
due to supply bounce at high frequencies.
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