LT3494A データシートの表示（PDF） - Linear Technology

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LT3494A

Micropower Low Noise Boost Converters with Output Disconnect

Linear Technology 

LT3494/LT3494A

PIN FUNCTIONS

SW (Pin 1): Switch Pin. This is the collector of the internal

NPN power switch. Minimize the metal trace area connected

to this pin to minimize EMI.

GND (Pin 2): Ground. Tie directly to local ground plane.

VCC (Pin 3): Input Supply Pin. Must be locally

bypassed.

CTRL (Pin 4): Dimming Pin. If not used, tie CTRL to 1.5V

or higher. If in use, drive CTRL below 1.225V to override

the internal reference. See Applications Information for

more information.

SHDN (Pin 5): Shutdown Pin. Tie to 1.5V or more to

enable device. Ground to shut down.

FB (Pin 6): Feedback Pin. Reference voltage is 1.225V.

There is an internal 182k resistor from the FB pin to GND.

To achieve the desired output voltage, choose R1 accord-

ing to the following formula:

R1

=

182

•

⎛

⎝⎜

VOUT(MAX)

1.225

⎞

– 1⎠⎟

kΩ

VOUT (Pin 7): Drain of Output Disconnect PMOS. Place a

bypass capacitor from this pin to GND. See Applications

Information.

CAP (Pin 8): This is the cathode of the internal Schottky

diode. Place a bypass capacitor from this pin to GND.

Exposed Pad (Pin 9): Ground. This pin must be soldered

to PCB.

BLOCK DIAGRAM

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