LT5500EGN データシートの表示（PDF） - Linear Technology

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LT5500EGN

1.8GHz to 2.7GHz Receiver Front End

Linear Technology 

BLOCK DIAGRA

1 EN

LT5500

BIAS

GS 24

3 LNA_IN

4, 11, 14, 16, 20, 23

5

6

7

8

GND

LNA_GND

2, 9, 17, 21

VCC

LNA_OUT 22

LO– 19

LO+ 18

10 MIX_GND

LO

MIX_IN 15

RF

IF

IF+

IF–

5500 BD

12

13

Figure 2. LT5500 Block Diagram

LT5500

APPLICATIONS INFORMATION

The LT5500 consists of an LNA, a Mixer, an LO buffer and

the associated bias circuitry. The chip is designed to be

compatible with IEEE802.11b wireless local area network

(WLAN), MMDS and other wireless applications. The LNA

and Mixer are designed to operate over an input frequency

range of 1.8GHz to 2.7GHz with a supply voltage of 1.8V

to 5.25V. The Mixer IF output frequency range is typically

10MHz to 450MHz with proper matching. The typical LO

drive is –10dBm. The LO buffer operation is broadband.

LNA

The LNA has two modes of operation: high gain and low

gain. In the high gain mode, the LNA is a cascode

amplifier. Package inductance is used to achieve better

than 10dB input return loss over the entire frequency

range. The input of the LNA must be AC coupled. The

linearity of the high gain mode of the LNA can be in-

creased by adding inductance to LNA_GND. This will

reduce the gain and improve input return loss while

having little impact on the low gain mode. In low gain

mode, the LNA uses a capacitively coupled diode and a

resistively degenerated cascode to attenuate the incom-

ing signal and maintain a moderate VSWR. The LNA

output is an open collector, and the matching circuit

requires a shunt inductor connected to the power supply

to provide the bias current. The component configuration

for matching and example component values are listed in

Figure 3. If it is desirable to reduce the gain further and

simultaneously broaden the LNA bandwidth, an addi-

tional shunt resistor to the power supply can be added to

the output to reduce the output quality factor (Q).

The LT5500 is designed to allow an interstage bandpass

filter to be introduced between the output of the LNA and

the input of the Mixer. If such an interstage filter is

unnecessary, the output of the LNA can be connected to

the Mixer input through a blocking capacitor and small

value resistor.

Mixer

The Mixer consists of a single-ended input differential pair

followed by a double-balanced mixer cell. The input match-

ing configuration for the Mixer is shown in Figure 3. The

Mixer uses a 4.7nH external inductance to act as a high

frequency current source at the MIX_GND pin. Example

component values for matching the mixer input are tabu-

lated in Figure 3.

5500f

7

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