LT5520EUF データシートの表示（PDF） - Linear Technology
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LT5520EUF Datasheet PDF : 12 Pages
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LT5520
TEST CIRCUIT
LOIN
1760MHz
IFIN
140MHz T1
1
2
3
R1
C1
5
C3
4
16
1 GND
GND
2 IF+
3 IF –
0.018"
0.062"
0.018"
ER = 4.4
C2
R2
RF
GND
4 GND
EN
5
EN
DC
GND
VCC
C5
15
LO–
14
LO+
13
GND 12
GND
LT5520
RF+ 11
RF – 10
VCC1
6
VCC2
7
9
GND
VCC3
8
L1
C4
RFOUT
1900MHz
5520 TC01
REF DES
C1, C2
C3
C4
C5
L1
R1, R2
T1
VALUE SIZE
220pF 0402
15pF
0402
1000pF 0402
1µF
0603
39nH
0402
100Ω, 0.1% 0603
4:1
SM-22
Figure 2. Test Schematic for the LT5520
PART NUMBER
AVX 04023C221KAT2A
AVX 04023A150KAT2A
AVX 04023A102KAT2A
Taiyo Yuden LMK107BJ105MA
Toko LL1005-FH39NJ
IRC PFC-W0603R-03-10R1-B
M/A-COM ETC4-1-2
APPLICATIO S I FOR ATIO
The LT5520 consists of a double-balanced mixer, a high-
performance LO buffer, and bias/enable circuits. The RF
and LO ports may be driven differentially; however, they
are intended to be used in single-ended mode by connect-
ing one input of each pair to ground. The IF input ports
must be DC-isolated from the source and driven differen-
tially. The IF input should be impedance-matched for the
desired input frequency. The LO input has an internal
broadband 50Ω match with return loss better than 10dB
at frequencies up to 3000MHz. The RF output band ranges
from 1300MHz to 2300MHz, with an internal RF trans-
former providing a 50Ω impedance match across the
band. Low side or high side LO injection can be used.
IF Input Port
The IF inputs are connected to the emitters of the double-
balanced mixer transistors, as shown in Figure 3. These
pins are internally biased and an external resistor must be
connected from each IF pin to ground to set the current
through the mixer core. The circuit has been optimized to
work with 100Ω resistors, which will result in approxi-
mately 18mA of DC current per side. For best LO leakage
performance, the resistors should be well matched; thus
resistors with 0.1%, tolerance are recommended. If LO
leakage is not a concern, then lesser tolerance resistors
can be used. The symmetry of the layout is also important
for achieving optimum LO isolation.
The capacitors shown in Figure 3, C1 and C2, serve two
purposes. They provide DC isolation between the IF+ and
IF – ports, thus preventing DC interactions that could
cause unpredictable variations in LO leakage. They also
improve the impedance match by canceling excess induc-
tance in the package and transformer. The input capacitor
value required to realize an impedance match at desired
frequency, f, can be estimated as follows:
C1
=
C2
=
1
(2πf)2(LIN
+
LEXT )
where; f is in units of Hz, LIN and LEXT are in H, and C1, C2
are in farad. LIN is the differential input inductance of the
LT5520, and is approximately 1.67nH. LEXT represents the
combined inductances of differential external compo-
nents and transmission lines. For the evaluation board
shown in Figure 10, LEXT = 4.21nH. Thus, for f = 140MHz,
the above formula gives C1 = C2 = 220pF.
5520f
6
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