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LT5525EUF データシートの表示(PDF) - Linear Technology

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LT5525EUF Datasheet PDF : 12 Pages
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APPLICATIO S I FOR ATIO
0
RF+
LT5525
2
–5
LT5525
C5
RFIN 4.7pF
L3
1.5nH
RF
3
5525 F05
Figure 5. Wideband RF Input Matching
0
–5
NO EXTERNAL
–10
RF MATCHING
–15
SERIES 1.5nH
–20 AND 4.7pF
–25
–30
500
1000 1500 2000 2500
RF FREQUENCY (MHz)
3000
5525 F06
Figure 6. RF Input Return Loss Using
Wideband Matching Network
single-ended drive, though differential drive can be used if
desired. The LO input is internally matched to 50. A
simplified schematic for the LO input is shown in Figure 7.
Measured return loss is shown in Figure 8.
If the LO source has a DC voltage present, then a coupling
capacitor should be used in series with the LO input pin
due to the internal resistive match.
LO
14
LT5525
20pF
VCC
LOIN
50
LO+
15
48054
20pF
5525 F07
Figure 7. LO Input Schematic
–10
–15
–20
0
500 1000 1500 2000 2500 3000
FREQUENCY (MHz)
5525 F08
Figure 8. LO Input Return Loss
The LO port input impedance and reflection coefficient
(S11) versus frequency are shown in Table 2. The listed
data is referenced to the LO+ pin with the LOpin grounded.
Table 2. Single-Ended LO Input Impedance
FREQUENCY
(MHz)
INPUT
IMPEDANCE
REFLECTION COEFFICIENT
MAG
ANGLE
100
93.1 – j121
0.686
–30
250
55.8 – j54
0.457
–57
500
47.7 – j28
0.276
–79
1000
42.3 – j14
0.171
–110
1500
38.5 – j9.3
0.166
–135
2000
35.8 – j7.8
0.187
–146
2500
34.8 – j7.8
0.281
–148
3000
34.2 – j8.7
0.214
–149
IF Output Port
A simplified schematic of the IF output circuit is shown in
Figure 9. The output pins, IF+ and IF, are internally con-
nected to the collectors of the mixer switching transistors.
Both pins must be biased at the supply voltage, which can
be applied through the center-tap of a transformer or
575
0.7pF
VCC
LT5525
IF+
11
IF10
L3
T2 IFOUT
4:1
C3 VCC
L2
5525 F09
Figure 9. IF Output with External Matching
5525f
9

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