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LTC1096(RevB) データシートの表示(PDF) - Linear Technology

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LTC1096
(Rev.:RevB)
Linear
Linear Technology Linear
LTC1096 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC1096/LTC1096L
LTC1098/LTC1098L
AC CHARACTERISTICS
LTC1096/LTC1098
VCC = 3V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.
SYMBOL PARAMETER
tSMPL
fSMPL(MAX)
tCONV
tdDO
tdis
ten
thDO
tf
tr
CIN
Analog Input Sample Time
Maximum Sampling Frequency
Conversion Time
Delay Time, CLKto DOUT Data Valid
Delay Time, CSto DOUT Hi-Z
Delay Time, CLKto DOUT Enable
Time Output Data Remains Valid After CLK
DOUT Fall Time
DOUT Rise Time
Input Capacitance
CONDITIONS
See Operating Sequence
See Operating Sequence
See Test Circuits (Note 9)
See Test Circuits (Note 9)
See Test Circuits (Note 9)
CLOAD = 100pF
See Test Circuits (Note 9)
See Test Circuits (Note 9)
Analog Inputs On Channel
Analog Inputs Off Channel
Digital Input
MIN TYP MAX
UNITS
1.5
CLK Cycles
q 16.5
kHz
8
CLK Cycles
q
500 1000
ns
q
220 800
ns
q
160 480
ns
400
ns
q
70 250
ns
q
50 150
ns
25
pF
5
pF
5
pF
LTC1096L/LTC1098L
VCC = 2.65V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
tSMPL
fSMPL(MAX)
tCONV
tdDO
tdis
ten
thDO
tf
tr
CIN
Analog Input Sample Time
Maximum Sampling Frequency
Conversion Time
Delay Time, CLKto DOUT Data Valid
Delay Time, CSto DOUT Hi-Z
Delay Time, CLKto DOUT Enable
Time Output Data Remains Valid After CLK
DOUT Fall Time
DOUT Rise Time
Input Capacitance
See Operating Sequence
See Operating Sequence
See Test Circuits
See Test Circuits
See Test Circuits
CLOAD = 100pF
See Test Circuits
See Test Circuits
Analog Inputs On Channel
Analog Inputs Off Channel
Digital Input
MIN TYP MAX
UNITS
1.5
CLK Cycles
q 16.5
kHz
8
CLK Cycles
q
500 1000
ns
q
220 800
ns
q
160 480
ns
400
ns
q
70 250
ns
q
50 200
ns
25
pF
5
pF
5
pF
The q denotes specifications which apply over the operating temperature
range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: For the 8-lead PDIP, consult the factory.
Note 4: Linearity error is specified between the actual and points of the
A/D transfer curve.
Note 5: Total unadjusted error includes offset, full scale, linearity,
multiplexer and hold step errors.
Note 6: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
below GND or one diode drop above VCC. This spec allows 50mV forward
bias of either diode. This means that as long as the reference or analog
input does not exceed the supply voltage by more than 50mV, the output
code will be correct. To achieve an absolute 0V to 5V input voltage range
will therefore require a minimum supply voltage of 4.950V over initial
tolerance, temperature variations and loading. For 5.5V < VCC 9V,
reference and analog input range cannot exceed 5.55V. If reference and
analog input range are greater than 5.55V, the output code will not be
guaranteed to be correct.
Note 7: The supply voltage range for the LTC1096L/LTC1098L is from
2.65V to 4V. The supply voltage range for the LTC1096 is from 3V to 9V,
but the supply voltage range for the LTC1098 is only from 3V to 6V.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: These specifications are either correlated from 5V specifications or
guaranteed by design.
7

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