LTC1405 データシートの表示（PDF） - Linear Technology
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LTC1405 Datasheet PDF : 16 Pages
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LTC1405
DIGITAL I PUTS AND OUTPUTSThe q denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply
operation. (Note 5)
SYMBOL
IIN
CIN
VOH
PARAMETER
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
VOL
Low Level Output Voltage
ISOURCE
ISINK
Output Source Current
Output Sink Current
CONDITIONS
VIN = 0V to VDD
0VDD = 4.75V, IO = –10µA
0VDD = 4.75V, IO = –200µA
0VDD = 2.7V, IO = –10µA
0VDD = 2.7V, IO = –200µA
0VDD = 4.75V, IO = 160µA
0VDD = 4.75V, IO = 1.6mA
0VDD = 2.7V, IO = 160µA
0VDD = 2.7V, IO = 1.6mA
VOUT = 0V
VOUT = VDD
MIN TYP MAX UNITS
q
±10
µA
1.8
pF
4.74
V
q 4.0
4.71
V
2.6
V
q 2.3
V
0.05
V
q
0.10 0.4
V
0.05
V
q
0.10 0.4
V
50
mA
35
mA
POWER REQUIRE E TS The q denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VDD
Positive Supply Voltage
VSS
Negative Supply Voltage
(Note 10)
Dual Supply Mode
Single Supply Mode
4.75
5.25
V
– 5.25
– 4.75
V
0
V
IDD
Positive Supply Current
q
23
28
mA
ISS
Negative Supply Current
q
0.8
1.2
mA
PD
Power Dissipation
q
115 145
mW
WU
TI I G CHARACTERISTICS The q denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. Specifications are guaranteed for both dual supply and single supply operation.
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
fSAMPLE
tCONV
tACQ
tH
tL
tAD
Sampling Frequency
Conversion Time
Acquisition Time
CLK High Time
CLK Low Time
Aperture Delay of Sample-and-Hold
(Note 9)
(Note 9)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below VSS or above VDD, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below VSS or above VDD without latchup.
MIN TYP MAX UNITS
q 0.02
5
MHz
q
150 180
ns
q 20
50
ns
q 20
100
ns
q 20
100
ns
– 250
ps
Note 4: When these pin voltages are taken below VSS they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below VSS without latchup. GAIN is not clamped to VDD. When CLK
is taken above VDD, it will be clamped by an internal diode. The CLK pin
can handle input currents of greater than 100mA above VDD without
latchup.
Note 5: VDD = 5V, VSS = – 5V or 0V, fSAMPLE = 5MHz, tr = tf = 5ns unless
otherwise specified.
4
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