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LTC1458CG データシートの表示(PDF) - Linear Technology

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LTC1458CG
Linear
Linear Technology Linear
LTC1458CG Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC1458/LTC1458L
TYPICAL PERFOR A CE CHARACTERISTICS
LTC1458 Full-Scale Voltage vs
Temperature
4.110
4.105
4.100
4.095
4.090
4.085
4.080
–55 –25
5 35 65
TEMPERATURE (°C)
95 125
1458 G06
LTC1458
Offset Voltage vs Temperature
5
4
3
2
1
0
–1
–2
–3
–4
–5
–55 –25 5 35 65 95 125
TEMPERATURE (°C)
1458 G07
LTC1458
Supply Current vs Temperature
950
940
930
920
VCC = 5.5V
910
900
890
VCC = 5V
880
870
VCC = 4.5V
860
850
–55 –25 5 35 65 95 125
TEMPERATURE (°C)
1458 G05
PI FU CTIO S
X1/X2 C, X1/X2 D,X1/X2 A, X1/X2 B (Pins 1, 14, 16, 27):
The Input Pin that Sets the Gain for DAC C/D/A/B. When
grounded the gain will be 2, i.e., output full-scale will be
2 • REFHI. When connected to VOUT the gain will be 1, i.e.,
output full-scale will be equal to REFHI.
VOUT C, VOUT D, VOUT A, VOUT B (Pins 2, 13, 17, 26): The
Buffered DAC Outputs.
CS/LD (Pin 3): The Serial Interface Enable and Load
Control Input.
DIN (Pin 4): The Serial Data Input.
REFHI C, REFHI D, REFHI A, REFHI B,(Pins 5, 9, 20, 24):
The Inputs to the DAC Resistor Ladder for DAC C/D/A/B.
GND (Pins 6, 23): Ground.
REFLO C, REFLO D, REFLO A, REFLO B, (Pins 7, 8, 21,
22): The Bottom of the DAC Resistor Ladders for the
DACs. These can be used to offset zero-scale above
ground. REFLO should be connected to ground when no
offset is required.
DOUT (Pin 10): The Output of the Shift Register which
Becomes Valid on the Rising Edge of the Serial Clock.
CLK (Pin 11): The Serial Interface Clock Input.
VCC (Pins 15, 28): The Positive Supply Input. 4.5V VCC
5.5V (LTC1458), 2.7V VCC 5.5V (LTC1458L). Re-
quires a 0.1µF bypass capacitor to ground.
REFOUT (Pin 19): The Output of the Internal Reference.
CLR (Pin 25): The Clear Pin. Clears all DACs to zero-scale
when pulled low.
5

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