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LTC1775 データシートの表示(PDF) - Linear Technology

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LTC1775 Datasheet PDF : 24 Pages
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LTC1775
APPLICATIO S I FOR ATIO
paid to the resulting thermal issues. Under DC conditions,
the maximum power that can be dissipated by a MOSFET
switch limits the current through it:
IDS(MAX)=
P=
RDS(ON)
TJ(MAX) – TA
θJA RDS(ON) ρTJ(MAX)
For example, the SUD50N03-10 with TJ(MAX) = 175°C,
TA =70°, θJA = 30° C/W, RDS(ON) = 0.019, ρTJ(MAX) = 1.8
can operate with a maximum DC current of 10A. In a
switching application, the actual power dissipation is
increased by the transition losses and is reduced by the
switch duty cycle. When the LTC1775 is operating in
continuous mode, the duty cycles for the MOSFETs are:
Top Duty Cycle = VOUT
VIN
Bottom Duty Cycle = VIN – VOUT
VIN
The MOSFET power dissipations at maximum output
current are:
PTOP
=

VOUT
VIN

2
(IO(MAX) )(ρT(TOP))(RDS(ON))
+ (k)(VIN2 )(IO(MAX))(C RSS)(f)
PBOT
=
VIN

– VOUT
VIN

2
(IO(MAX)
)(ρT (BOT ) )(RDS(ON)
)
Both MOSFETs have I2R losses and the PTOP equation
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7 can be
used to estimate the amount of transition loss. The bottom
MOSFET losses are greatest at high input voltage or during
a short circuit when the duty cycle is nearly 100%. The
temperature rise of the MOSFETs depends on the effective
thermal resistance θJA of the heat sink used in the applica-
tion. Check the temperature of the MOSFET when testing
applications and use appropriate heat sinking such as
board power planes to spread the heat.
Operating Frequency and Synchronization
The choice of operating frequency and inductor value is a
trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation
requires more inductance for a given amount of ripple
current.
The internal oscillator runs at a nominal 150kHz frequency
when the SYNC pin is left open or connected to ground.
Pulling the SYNC pin above 1.2V will increase the fre-
quency by 50%. The oscillator will injection lock to a clock
signal applied to the SYNC pin with a frequency between
165kHz and 200kHz. The clock high level must exceed
1.2V for at least 1µs and no longer than 4µs as shown in
Figure 4. The top MOSFET turn-on will synchronize with
the rising edge of the clock.
1µs < tON < 4µs
7V
1.2V
0
5µs < t < 6µs
1775 F04
Figure 4. SYNC Clock Waveform
Inductor Value Selection
Given the desired input and output voltages, the inductor
value and operating frequency directly determine the
ripple current:
IL
=
(Vf)O(ULT)


1–
VOUT
VIN

Lower ripple current reduces losses in the inductor, ESR
losses in the output capacitors and output voltage ripple.
Thus, highest efficiency operation is obtained at low
frequency with small ripple current. To achieve this, how-
ever, requires a large inductor.
10

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