LTC2919HDDB-3.3-TRPBF データシートの表示（PDF） - Linear Technology
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LTC2919HDDB-3.3-TRPBF
Linear Technology
LTC2919HDDB-3.3-TRPBF Datasheet PDF : 16 Pages
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LTC2919
PI FU CTIO S (MSOP/DFN Package)
ADJ1 (Pin 10): Adjustable Voltage Input 1. Input to volt-
age monitor comparator 1 (0.5V nominal threshold). The
polarity of the input is selected by the state of the SEL
pin (refer to Table 1). Tie to REF if unused (with SEL =
VCC or Open).
Exposed Pad (Pin 11, DFN Only): The Exposed Pad may
be left unconnected. For better thermal contact, tie to a PCB
trace. This trace must be grounded or unconnected.
BLOCK DIAGRA
ADJ1
SEL
THREE-STATE
DECODE
CONTROL 2
+
CONTROL 1
VCC
VCC
6.5V
OUT1
–
VCC
+
EN
–
ADJ2
+
ADJUSTABLE
PULSE
GENERATOR
200ms
PULSE
GENERATOR
TMR
THREE-STATE
DECODE
RST
GND
OUT2
–
+– 500mV
REF
+– 1.000V
SEL
GND
OPEN
VCC
CONTROL 1
H
L
L
CONTROL 2
H
H
L
CONTROL = H = NEGATIVE POLARITY
CONTROL = L = POSITIVE POLARITY
2919 BD
WU
W
TI I G DIAGRA S
Positive Polarity Input Timing
VADJ
VRT
RST
1V
tPROP
OUT
1V
tPROP
VRT + ΔVRT
tRST
tPROP
Negative Polarity Input Timing
VADJ
VRT
RST
1V
tPROP
OUT
1V
tPROP
VRT – ΔVRT
tRST
tPROP
UVLO Timing
NOTES:
1. ΔVRT AND ΔVCC(UVLO) = 0, except in
Comparator Mode
2. IN COMPARATOR MODE, tRST = tPROP.
VCC VCC(UVLO)
tUV
RST
1V
tPROP
OUT
1V
VCC(UVLO) + ΔVCC(UVLO)
tRST
tPROP
2919 TD
2919f
7
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