DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LTC3454EDD データシートの表示(PDF) - Linear Technology

部品番号
コンポーネント説明
メーカー
LTC3454EDD Datasheet PDF : 12 Pages
First Prev 11 12
LTC3454
APPLICATIONS INFORMATION
LED Failure Modes
If the LED fails as an open circuit, the safety amplifier takes
control of the regulation loop to prevent VOUT runaway.
The VOUT threshold at which this occurs is about 5.15V.
The safety amplifier has no effect on loop regulation at
VOUT less than 5.15V.
VIN
VOUT
If the LED fails as a short-circuit, the current limiting
circuitry detects this condition and limits the peak input
current to a safe level.
VIN
VOUT
VOLTAGE
DAC
ENx
LTC3454
ISETx
RSET ≥ RMIN
LED
ILED
=
3850
0.8V – VDAC
RSET
VDAC
(3a)
VIN
VOUT
CURRENT
DAC
ENx
LTC3454
ISETx
LED
0.8V
IDAC ≤ RMIN
ILED = 3850 • IDAC
(3b)
VIN
VOUT
ENx
LTC3454
ISETx
RMIN
LED
0.8V
ILED = 3850 RMIN + RPOT
RPOT
(3c)
RSET
100
ENx
LTC3454
ISETx
RSET ≥ RMIN
VPWM
LED
ILED
=
3850
0.8V – VPWM
RSET
=
3850
0.8V
(DC% •
RSET
VDVCC)
DVCC
fPWM ≥ 10kHz
(3d)
3454 F03
Figure 3. Brightness Control Methods: (a) Using Voltage DAC, (b) Using Current DAC, (c) Using Potentiometer, (d) Using PWM Input
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.675 p0.05
R = 0.115
TYP
6
0.38 p 0.10
10
3.50 p0.05
1.65 p0.05
2.15 p0.05 (2 SIDES)
0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)
PACKAGE
OUTLINE
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
3.00 p0.10 1.65 p 0.10
(4 SIDES) (2 SIDES)
0.75 p0.05
0.00 – 0.05
(DD) DFN 1103
5
1
0.25 p 0.05
0.50 BSC
2.38 p0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3454fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]