LTC3240 データシートの表示（PDF） - Linear Technology

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LTC3240

3.3V/2.5V Step-Up/Step-Down Charge Pump DC/DC Converter

Linear Technology 

LTC3240-3.3/LTC3240-2.5

TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF

unless otherwise noted)

Load Transient Response

(LTC3240-3.3)

Output Noise/Ripple

(LTC3240-2.5)

Load Transient Response

(LTC3240-2.5)

VOUT

20mV/DIV

AC COUPLED

LDO MODE

60mA

ILOAD

10mA

VIN = 3.7V

10µs/DIV

ILOAD = 10mA TO 60mA

VOUT

20mV/DIV

AC COUPLED

3240 G15

VIN = 2.4V

500ns/DIV

ILOAD = 100mA

VOUT

20mV/DIV

AC COUPLED

Burst Mode

OPERATION

CONST FREQUENCY

MODE

50mA

ILOAD

10mA

3240 G16

VIN = 2.4V

10µs/DIV

ILOAD = 10mA TO 50mA

3240 G17

PI FU CTIO S

GND (Pin 1): Ground. This pin should be tied to a ground

plane for best performance.

VIN (Pin 2): Input Supply Voltage. VIN should be bypassed

with a 1μF or greater, low ESR ceramic capacitor.

VOUT (Pin 3): Regulated Output Voltage. VOUT should be

bypassed with a 4.7μF or greater, low ESR ceramic capaci-

tor as close to the pin as possible for best performance.

C+ (Pin 4): Flying Capacitor Positive Terminal.

C– (Pin 5): Flying Capacitor Negative Terminal.

S⎯ H⎯ D⎯ N⎯ (Pin 6): Active Low Shutdown Input. A low on S⎯ H⎯ D⎯ N⎯

disables the LTC3240-3.3/LTC3240-2.5. This pin is a high

impedance CMOS input pin which must be driven with valid

logic levels. This pin must not be allowed to float.

Exposed Pad (Pin 7): Ground. The exposed pad must be

soldered to PCB ground to provide electrical contact and

optimum thermal performance.

3240fb

5

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