LTC4218IGN-PBF データシートの表示（PDF） - Linear Technology
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LTC4218IGN-PBF Datasheet PDF : 18 Pages
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LTC4218
Applications Information
can be calculated using electrical table parameters as
follows:
RSHUNT1
=
(
R(IN)
VNEW
• VOLD
– VOLD
)
=
18k • 9.88V
(10.5V – 9.88V
)
=
287k
LTC4218-12
VDD
RSHUNT2
OV
UV
RSHUNT1
4218 F04
Figure 4. Adjusting LTC4218-12 Thresholds
In this same figure the OV threshold is lowered from
15.05V to 13.5V. Decreasing the OV threshold requires
adding a resistor between VDD and OV. This resistor can
be calculated as follows:
( ) ( ) RSHUNT2
=
R(IN) • VOLD
V(TH)
VNEW – VOV(TH)
VOLD – VNEW
=
18k • 15.05V
1.235V
(13.5V – 1.235V)
(15.05V – 13.5V)
=
1.736M
Use the equation for RSHUNT1 for increasing the OV and
FB thresholds. Likewise, use the equation for RSHUNT2 for
decreasing the UV and FB thresholds.
Design Example
Consider the following design example (Figure 5): VIN =
12V, IMAX = 7.5A. IINRUSH = 1A, CL = 330µF, VUVON = 9.88V,
VOVOFF = 15.05V, VPGTHRESHOLD = 10.5V. A current limit fault
triggers an automatic restart of the power up sequence.
The selection of the sense resistor, (RS), is set by the
overcurrent threshold of 15mV:
RS = 15mV/IMAX = 15mV/7.5A = 0.002Ω
The MOSFET should be sized to handle the power dissi-
pation during the inrush charging of the output capacitor
COUT. The method used to determine the power in Q1 is
the principal:
EC = Energy in CL = Energy in Q1
Thus:
EC = ½ CV2 = ½ (330µF)(12)2 = 0.024J
Calculate the time it takes to charge up COUT:
tCHARGUP
=
CL • VIN
IINRUSH
=
330µF • 12V
1A
= 4ms
12V
Z1*
*TVS Z1: DIODES INC SMAJ17A
CT
0.1µF
C1
1µF
RS
2mΩ
Q1
Si7108DN
R1
10Ω
SENSE– GATE SOURCE
SENSE+
VDD
UV
LTC4218DHC-12
FLT
PG
TIMER
INTVCC
GND
IMON
VOUT
12V
+
6A
CL
330µF
RGATE
1k
CGATE
0.01µF
UV = 9.88V
OV = 15.05V
PG = 10.5V
R8
10k
RMON
20k
ADC
4218 F05
Figure 5. 6A, 12V Card Resident Application
For more information www.linear.com/LTC4218
4218fh
13
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