4355 データシートの表示（PDF） - Linear Technology
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4355 Datasheet PDF : 20 Pages
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LTC4355
APPLICATIONS INFORMATION
Loop Stability
The servo loop is compensated by the parasitic capaci-
tance of the power N-channel MOSFET. No further
compensation components are normally required. In
the case when a MOSFET with less than 1000pF gate
capacitance is chosen, a 1000pF compensation capacitor
connected across the gate and source pins might be
required.
Design Example
The following design example demonstrates the calculations
involved for selecting components in a 36V to 72V system
with 5A maximum load current (see Figure 2).
First, choose the N-channel MOSFET. The 100V, FDS3672
in the SO-8 package with RDS(ON) = 22mΩ(max) offers a
good solution. The maximum voltage drop across it is:
ΔV = 5A • 22mΩ = 110mV
The maximum power dissipation in the MOSFET is a mere:
P = 5A • 110mV = 0.55W
Next, select the resistive dividers that guarantee the
PWRFLT pins will not assert when the input supplies are
above 36V. The maximum VMONx(TH) is 1.245V and the
maximum IMONx(IN) is 1μA. Choose a 1% tolerance resistor
R1 = 12.7k. Then,
IR2
=
VMONx(TH)
R1(MIN)
+ IMONx(TH)(MAX)
= 1.245V + 1μA = 100μA
12.7kΩ(−1%)
Use IR2 to choose R2.
R2
=
36V − 1.245V
100μA
=
348kΩ
Adjust R2 down by 1% to 344k to account for its tolerance.
The next lower standard resistor value is R2 = 340k.
The LED D1, a Panasonic Green LN1351C, requires at least
1mA of current to fully turn on. Therefore, R5 is set to 33k
to accommodate the lowest input supply voltage of 36V.
VIN1 = +48V
VIN2 = +48V
GND
F1
M1
7A
FDS3672
F2
M2
7A
FDS3672
R2
R4
340k 340k IN1 GATE1 IN2 GATE2 OUT
MON1
SET
MON2
LTC4355
GND
VDSFLT
FUSEFLT1
FUSEFLT2
PWRFLT1
PWRFLT2
TO
LOAD
R5
R7
R9
33k
33k
33k
R6
R8
33k
33k
R1
R3
12.7k 12.7k
GREEN LEDs D1
PANASONIC LN1351C
D3
D2
D5
D4
4355 F02
Figure 2. 36V to 72V/5A Design Example
4355fe
10
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