LX8610-00CDM データシートの表示（PDF） - Microsemi Corporation
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LX8610-00CDM Datasheet PDF : 6 Pages
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A MICROSEMI COMPANY
LX8610-xx
1A BiCMOS Very Low Dropout Regulators
PRELIMINARY DATASHEET
Input Voltage (VIN) ......................................................................................................6.5V
Enable Pin ..............................................................................................-0.3V to VIN+0.3V
Operating Junction Temperature Plastic (ST & DM) Packages .................................125°C
Storage Temperature ................................................................................... -65°C to 150°C
Lead Temperature (Soldering, 10 Seconds) ...............................................................300°C
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
ST PLASTIC SOT-223 PACKAGE
THERMAL RESISTANCE-JUNCTION TO TAB, θJT
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
DM PLASTIC SOIC PACKAGE
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJLD
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
15°C/W*
150°C/W
30°C/W
90°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
θJA can be improved with package soldered copper area over backside ground plane or
internal power plane. θJA can vary from 45°C/W > 75°C/W depending on mounting
technique. See table below for thermal resistance guidelines:
Copper Area
(Topside)*
Copper Area
(Backside)*
Board Area
Thermal
Resistance
(θJA)
2.0 sq” (1290mm2)
1.0 sq” (645 mm2)
0.5 sq” (323 mm2)
0.25 sq” (161 mm2)
ST (SOT-223)
1.0 sq” (645 mm2) 2.0 sq” (1290mm2)
0.5 sq” (323 mm2) 1.0 sq” (645 mm2)
0.1 sq” (65 mm2)
0.5 sq” (323 mm2)
0.1 sq” (65 mm2) 0.25 sq” (161 mm2)
45°C/W
50°C/W
60°C/W
70°C/W
2.0 sq” (1290mm2)
1.0 sq” (645 mm2)
0.5 sq” (323 mm2)
0.25 sq” (161 mm2)
DM (SOIC)
1.0 sq” (645 mm2) 2.0 sq” (1290mm2)
0.5 sq” (323 mm2) 1.0 sq” (645 mm2)
0.1 sq” (65 mm2)
0.5 sq” (323 mm2)
0.1 sq” (65 mm2) 0.25 sq” (161 mm2)
60°C/W
67°C/W
70°C/W
75°C/W
*Tab of device attached to topside copper, or leads 2,3,5,6 of SOIC package
TAB IS GND
3
2
1
V OUT
GND
V IN
ST PACKAGE
(Top View)
V OUT
1
8
ADJ
GND/
H E A T S IN K
GND/
H E A T S IN K
GND/
2
7
H E A T S IN K
3
6
GND/
H E A T S IN K
ENABLE
4
5
V IN
DM PACKAGE
(Top View)
Possible Heat Sink Approaches
using PCB Copper
1
8
2
7
3
6
4
5
Copyright © 2000
Rev. 0.6f,2000-09-15
Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
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