DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LZ24BP データシートの表示(PDF) - Sharp Electronics

部品番号
コンポーネント説明
メーカー
LZ24BP Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
LZ24BP
PIN DESCRIPTION
SYMBOL
PIN NAME
OD
Output transistor drain
OS
Output signals
ØRS
Reset transistor clock
ØV1, ØV2, ØV3A, ØV3B
Vertical shift register clock
ØH1, ØH2
Horizontal shift register clock
OFD
Overflow drain
PW
P-well
GND
Ground
NC
No connection
ABSOLUTE MAXIMUM RATINGS
(TA = +25 ˚C)
PARAMETER
SYMBOL
RATING
UNIT NOTE
Output transistor drain voltage
VOD
0 to +18
V
Overflow drain voltage
VOFD
Internal output
V
1
Reset gate clock voltage
VØRS
Internal output
V
2
Vertical shift register clock voltage
VØV
–11.5 to +17.5
V
Horizontal shift register clock voltage
VØH
–0.3 to +12
V
Voltage difference between P-well and vertical clock VPW-VØV
–29 to 0
V
Voltage difference between vertical clocks
VØV-VØV
0 to +15
V
3
Storage temperature
TSTG
–40 to +85
˚C
Ambient operating temperature
TOPR
–20 to +70
˚C
NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is
applied below 27 Vp-p.
2. Do not connect to DC voltage directly. When ØRS is connected to GND, connect VOD to GND. Reset gate clock is
applied below 8 Vp-p.
3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be
below 28 V.
2

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]