M41T81 データシートの表示（PDF） - STMicroelectronics

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M41T81

SERIAL ACCESS RTC WITH ALARMS

STMicroelectronics 

M41T81

Figure 10. Serial Bus Data Transfer Sequence

DATA LINE

STABLE

DATA VALID

CLOCK

DATA

START

CONDITION

CHANGE OF

DATA ALLOWED

Figure 11. Acknowledgement Sequence

START

SCL FROM

MASTER

1

2

DATA OUTPUT

BY TRANSMITTER

MSB

DATA OUTPUT

BY RECEIVER

STOP

CONDITION

AI00587

CLOCK PULSE FOR

ACKNOWLEDGEMENT

8

9

LSB

AI00601

10/28

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