29W040 データシートの表示（PDF） - STMicroelectronics

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29W040

4 Mbit 512Kb x8 / Uniform Block Low Voltage Single Supply Flash Memory

STMicroelectronics 

Figure 7. Write AC Waveforms, W Controlled

M29W040

A0-A18

E

G

W

DQ0-DQ7

tAVWL

tELWL

tGHWL

WRITE CYCLE

VALID

tWLAX

tWHEH

tWHGL

tWLWH

tDVWH

VALID

tWHWL

tWHDX

VCC

tVCHEL

AI01365B

Note: Address are latched on the falling edge of W, Data is latched on the rising edge of W.

Program (PG) instruction. The memory can be

programmed Byte-by-Byte. This instruction uses

four write cycles. The Program command A0h is

written on the third cycle after two coded cycles. A

fourth write operation latches the Address on the

falling edge of W or E and the Data to be written

on its rising edge and starts the P/E.C. During the

execution of the program by the P/E.C., the mem-

ory will not acceptany instruction.Read operations

output the status bits after the programming has

started. The status bits DQ5, DQ6 and DQ7 allow

a checkof the statusof the programmingoperation.

Memory programming is made only by writing ’0’ in

place of ’1’ in a Byte.

Erase Suspend (ES) instruction. The Block

Erase operation may be suspended by this instruc-

tion which consists of writing the command B0h

without any specific addresscode. No codedcycles

are required.It allows reading of data from another

block while erase is in progress. Erase suspend is

accepted only during the Block Erase instruction

execution and defaults to read array mode. Writing

this command during Erase timeout will, in addition

to suspending the erase, terminate the timeout.

The Toggle Bit DQ6 stops toggling when the P/E.C.

is suspended. ToggleBit status must be monitored

at an address out of the block being erased. Toggle

Bit will stop toggling between 0.1µs and 15µs after

the Erase Suspend (ES) command has been writ-

ten.

The M29W040 will then automatically set to Read

Memory Array mode. When erase is suspended,

Read from blocks being erased will output invalid

data, Read from block not being erased is valid.

During the suspension the memory will respond

only to Erase Resume (ER) and Reset (RST) in-

structions. RST command will definitively abort

erasure and result in the invalid data in the blocks

being erased.

Erase Resume (ER) instruction. If an Erase Sus-

pend instruction was previously executed, the

erase operation may be resumed by giving the

command 30h, at any address, and without any

coded cycles.

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