29W040 データシートの表示（PDF） - STMicroelectronics
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29W040 Datasheet PDF : 31 Pages
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M29W040
Table 14A. Write AC Characteristics, Chip Enable Controlled
(TA = 0 to 70°C, –20 to 85°C or –40 to 85°C)
M29W040
Symbol Alt
Parameter
-100
VCC = 3.3V±0.3V
CL = 30pF
Min
Max
-120
VCC = 3.3V±0.3V
Min
Max
tAVAV
tWC Address Valid to Next Address Valid
100
120
tWLEL
tWS Write Enable Low to Chip Enable Low
0
0
tELEH
tCP Chip Enable Low to Chip Enable High
45
50
tDVEH
tDS Input Valid to Chip Enable High
45
50
tEHDX
tDH Chip Enable High to Input Transition
0
0
tEHWH
tWH Chip Enable High to Write Enable High
0
0
tEHEL
tCPH Chip Enable High to Chip Enable Low
25
30
tAVEL
tAS Address Valid to Chip Enable Low
0
0
tELAX
tAH Chip Enable Low to Address Transition
45
50
tGHEL
Output Enable High Chip Enable Low
0
0
tVCHWL
tVCS VCC High to Write Enable Low
50
50
tEHQV1 (1)
Chip Enable High to Output Valid (Program)
12
12
tEHQV2 (1)
Chip Enable High to Output Valid
(Block Erase)
1.5
30
1.5
30
tEHGL
tOEH Chip Enable High to Output Enable Low
0
0
Note: 1. Time is measured to Data Polling or Toggle Bit, tWHQV = tWHQ7V + tQ7VQV.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
sec
ns
Power Up
The memory Command Interfaceis reseton power
up to Read Array. Either E or W must be tied to VIH
during Power-up to allow maximum security and
the possibility to write a command on the first rising
adge of E or W. Any write cycle initiation is blocked
when VCC is below VLKO.
Supply Rails
Normal precautions must be taken for supply volt-
age decoupling, each device in a system should
have the VCC rail decoupledwith a 1.0µF capacitor
close to the VCC and VSS pins. The PCB trace
widths should be sufficient to carry the VCC pro-
gram and erase currents required.
16/31
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