M29W400B データシートの表示（PDF） - STMicroelectronics

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M29W400B

4 Mbit (512Kb x8 or 256Kb x16, Boot Block) Low Voltage Single Supply Flash Memory

STMicroelectronics 

M29W400T, M29W400B

Output Enable (G). The Output Enable gates the

outputs through the data buffers during a read

operation. When G is High the outputs are High

impedance. G must be forced to VID level during

Block Protection and Unprotection operations.

Write Enable (W). This input controls writing to the

Command Register and Addressand Data latches.

Byte/Word Organization Select (BYTE). The

BYTE input selects the output configurationfor the

device: Byte-wide (x8) mode or Word-wide (x16)

mode. When BYTE is Low, the Byte-wide mode is

selected and the data is read and programmed on

DQ0-DQ7. In this mode, DQ8-DQ14 are at high

impedance and DQ15A–1 is the LSB address.

When BYTE is High, the Word-wide mode is se-

lected and the data is read and programmed on

DQ0-DQ15.

Ready/Busy Output (RB). Ready/Busy is an

open-drain output and gives the internal state of the

P/E.C. of the device. When RB is Low, the device

is Busy with a Program or Erase operation and it

will not accept any additional program or erase

instructions except the Erase Suspend instruction.

When RB is High, the device is ready for any Read,

Program or Erase operation. The RB will also be

High when the memory is put in Erase Suspend or

Standby modes.

Reset/Block Temporary Unprotect Input (RP).

The RP Input provides hardware reset and pro-

tected block(s) temporary unprotection functions.

Reset of the memory is acheived by pulling RP to

VIL for at least tPLPX. When the reset pulse is given,

if the memory is in Read or Standby modes, it will

be available for new operations in tPHEL after the

rising edge of RP. If the memory is in Erase, Erase

Suspend or Program modes the reset will take

tPLYH during which the RB signal will be held at VIL.

The end of the memory reset will be indicated by

the rising edge of RB. A hardware reset during an

Erase or Program operation will corrupt the data

being programmed or the sector(s) being erased

(see Table 14 and Figure 9).

Temporary block unprotection is made by holding

RP at VID. In this condition previously protected

blocks can be programmed or erased. The transi-

tion of RP from VIH to VID must slower than tPHPHH.

When RP is returned from VID to VIH all blocks

temporarily unprotected will be again protected.

See Table 15 and Figure 9.

VCC Supply Voltage. The power supply for all

operations (Read, Program and Erase).

VSS Ground. VSS is the reference for all voltage

measurements.

DEVICE OPERATIONS

See Tables 4, 5 and 6.

Read. Read operations are used to output the

contents of the Memory Array, the Electronic Sig-

nature, the Status Register or the Block Protection

Status. Both Chip Enable E and Output Enable G

must be low in order to read the output of the

memory.

Write. Writeoperationsare used to give Instruction

Commands to the memory or to latch input data to

be programmed. A write operation is initiated when

Chip Enable E is Low and Write Enable W is Low

with Output Enable G High. Addresses are latched

on the falling edge of W or E whichever occurs last.

Commands and InputData are latchedon therising

edge of W or E whichever occurs first.

Output Disable. The data outputs are high imped-

ance when the Output Enable G is High with Write

Enable W High.

Standby. The memory is in standby when Chip

Enable E is High and the P/E.C. is idle. The power

consumption is reduced to the standby level and

the outputs are high impedance, independent of

the Output Enable G or Write Enable W inputs.

Automatic Standby. After 150ns of bus inactivity

and when CMOS levels are driving the addresses,

the chip automatically enters a pseudo-standby

mode where consumption is reduced to the CMOS

standby value, while outputs still drive the bus.

Electronic Signature. Two codes identifying the

manufacturer and the device can be read from the

memory. The manufacturer ’s code for STMi-

croelectronics is 20h, the device code is EEh for

the M29W400T (Top Boot) and EFh for the

M29W400B(Bottom Boot). These codes allow pro-

gramming equipment or applications to automat-

ically match their interface to the characteristics of

the M29W400. The Electronic Signature is output

by a Read operation when the voltage applied to

A9 is at VID and address inputs A1 is Low. The

manufacturer code is output when the Address

input A0 is Low and the device code when this

input is High. Other Address inputs are ignored.

The codes are output on DQ0-DQ7.

The Electronic Signature can also be read, without

raising A9 to VID, by giving the memory the Instruc-

tion AS. If the Byte-wide configuration is selected

the codes are output on DQ0-DQ7 with DQ8-DQ14

at High impedance; if the Word-wide configuration

is selected the codes are output on DQ0-DQ7 with

DQ8-DQ15 at 00h.

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