M36DR432D データシートの表示（PDF） - STMicroelectronics

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M36DR432D

32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product

STMicroelectronics 

M36DR432C

M36DR432D

32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory

and 4 Mbit (256K x16) SRAM, Multiple Memory Product

PRELIMINARY DATA

FEATURES SUMMARY

s SUPPLY VOLTAGE

– VDDF = VDDS =1.9V to 2.1V

– VPPF = 12V for Fast Program (optional)

s ACCESS TIME: 85,100ns

s LOW POWER CONSUMPTION

s ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Top Device Code, M36DR432C: 00A4h

– Bottom Device Code, M36DR432D: 00A5h

FLASH MEMORY

s 32 Mbit (2Mb x16) BOOT BLOCK

– Parameter Blocks (Top or Bottom Location)

s PROGRAMMING TIME

– 10µs typical

– Double Word Programming Option

s ASYNCRONOUS PAGE MODE READ

– Page width: 4 Word

– Page Mode Access Time: 35ns

s DUAL BANK OPERATION

– Read within one Bank while Program or

Erase within the other

– No Delay between Read and Write

Operations

s BLOCK PROTECTION ON ALL BLOCKS

– WPF for Block Locking

s COMMON FLASH INTERFACE

– 64 bit Security Code

SRAM

s 4 Mbit (256K x 16 bit)

s LOW VDDS DATA RETENTION: 1V

s POWER DOWN FEATURES USING TWO

CHIP ENABLE INPUTS

Figure 1. Packages

FBGA

Stacked LFBGA66 (ZA)

8 x 8 ball array

November 2001

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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