M36W0R5020B0 データシートの表示（PDF） - STMicroelectronics

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M36W0R5020B0

32 Mbit (2Mb x16, Multiple Bank, Burst) Flash Memory and 4 Mbit SRAM, 1.8V Supply Multi-Chip Package

STMicroelectronics 

M36W0R5020T0, M36W0R5020B0

PART NUMBERING

Table 13. Ordering Information Scheme

Example:

M36 W0 R 5 0 2 0 T 0 ZAQ T

Device Type

M36 = Multi-Chip Package (Flash + RAM)

Flash 1 Architecture

W = Multiple Bank, Burst mode

Flash 2 Architecture

0 = none present

Operating Voltage

R = VDDF = VDDQ =VDDP = 1.7 to 1.95V

Flash 1 Density

5 = 32 Mbit

Flash 2 Density

0 = none present

RAM 1 Density

2 = 4 Mbit

RAM 0 Density

0 = none present

Parameter Blocks Location

T = Top Boot Block Flash

B = Bottom Boot Block Flash

Product Version

0 = 0.13µm Flash technology, 70ns; 0.15µm RAM, 70ns speed

Package

ZAQ = Stacked TFBGA88 8 x 10mm - 8x10 active ball array, 0.8mm pitch

Option

Blank = Standard Packing

T = Tape & Reel Packing

E = Lead-free and RoHS Package, Standard Packing

F = Lead-free and RoHS Package, Tape & Reel Packing

Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available op-

tions (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST-

Microelectronics Sales Office nearest to you.

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