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M58MR064-ZC データシートの表示(PDF) - STMicroelectronics

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M58MR064-ZC Datasheet PDF : 52 Pages
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M58MR064C
M58MR064D
64 Mbit (4Mb x16, Mux I/O, Dual Bank, Burst)
1.8V Supply Flash Memory
s SUPPLY VOLTAGE
– VDD = VDDQ = 1.65V to 2.0V for Program,
Erase and Read
– VPP = 12V for fast Program (optional)
s MULTIPLEXED ADDRESS/DATA
s SYNCHRONOUS / ASYNCHRONOUS READ
– Burst mode Read: 54MHz
– Page mode Read (4 Words Page)
– Random Access: 100ns
s PROGRAMMING TIME
– 10µs by Word typical
– Two or four words programming option
s MEMORY BLOCKS
– Dual Bank Memory Array: 16/48 Mbit
– Parameter Blocks (Top or Bottom location)
s DUAL OPERATIONS
– Read within one Bank while Program or
Erase within the other
– No delay between Read and Write operations
s PROTECTION/SECURITY
– All Blocks protected at Power-up
– Any combination of Blocks can be protected
– 64 bit unique device identifier
– 64 bit user programmable OTP cells
– One parameter block permanently lockable
s COMMON FLASH INTERFACE (CFI)
s 100,000 PROGRAM/ERASE CYCLES per
BLOCK
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M58MR064C: 88DCh
– Bottom Device Code, M58MR064D: 88DDh
FBGA
TFBGA48 (ZC)
10 x 4 ball array
Figure 1. Logic Diagram
VDD VDDQ VPP
6
A16-A21
16
ADQ0-ADQ15
W
E
WAIT
G
M58MR064C
M58MR064D
RP
BINV
WP
L
K
VSS
AI90087
March 2002
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