M5M5V416BRT データシートの表示（PDF） - Mitsumi
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M5M5V416BRT Datasheet PDF : 11 Pages
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revision-P04, ' 98.12.16
MITSUBISHI LSIs
M5M5V416BTP,RT
(4)TIMING DIAGRAMS
Read cycle
A 0~17
BC1 ,BC2
S1
(Note3)
(Note3)
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
tCR
ta(A)
ta(BC1) or ta(BC2)
tv (A)
ta(S1)
tdis (BC1) or tdis (BC1)
tdis (S1)
(Note3)
(Note3)
S2
(Note3)
OE
W = "H" lev el
(Note3)
DQ1~16
Write cycle ( W control mode )
ta(S2)
ta (OE)
ten (OE)
ten (BC1)
ten (BC2)
ten (S1)
ten (S2)
tCW
tdis (S2)
tdis (OE)
VALID DATA
(Note3)
(Note3)
A 0~17
BC1,BC2
S1
S2
(Note3)
(Note3)
(Note3)
tsu (BC1) or tsu(BC2)
tsu (S1)
tsu (S2)
(Note3)
(Note3)
(Note3)
OE
W
DQ1~16
tsu (A)
tdis(OE)
tsu (A-WH)
tw (W)
tdis (W)
DATA IN
STABLE
tsu (D) th (D)
trec (W)
ten(OE)
ten (W)
MITSUBISHI ELECTRIC
5
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