M5M5V208VP-85-W データシートの表示（PDF） - Mitsumi

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M5M5V208VP-85-W

2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM

Mitsumi 

'97.3.21

MITSUBISHI LSIs

M5M5V208FP,VP,RV,KV,KR -70L-W , -85L -W, -10L-W , -12L-W ,

-70LL-W, -85LL-W, -10LL-W, -12LL-W

2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM

FUNCTION

The operation mode of the M5M5V208 is determined by a

combination of the device control inputs S1, S2, W and OE.

Each mode is summarized in the function table.

A write cycle is executed whenever the low level W

overlaps with the low level S1 and the high level S2. The

address must be set up before the write cycle and must be

stable during the entire cycle. The data is latched into a cell

on the trailing edge of W, S1 or S2, whichever occurs first,

requiring the set-up and hold time relative to these edge to

be maintained. The output enable OE directly controls the

output stage. Setting the OE at a high level,the output stage

is in a high-impedance state, and the data bus contention

problem in the write cycle is eliminated.

FUNCTION TABLE

A read cycle is executed by setting W at a high level and

OE at a low level while S1 and S2 are in an active state (S1

= L ,S2 = H).

When setting S1 at a high level or S2 at a low level, the

chips are in a non-selectable mode in which both reading

and writing are disabled. In this mode, the output stage is in

a high-impedance state, allowing OR-tie with other chips

and memory expansion by S1 or S2. The power supply

current is reduced as low as the stand-by current which is

specified as Icc3 or Icc4, and the memory data can be held

at +2V power supply, enabling battery back-up operation

during power failure or power-down operation in the non-

selected mode.

S1 S2 W

X LX

H XX

L HL

L HH

L HH

OE

Mode

X Non selection

X Non selection

X

Write

L

Read

H

DQ

High-impedance

High-impedance

D IN

D OUT

High-impedance

Icc

Standby

Standby

Active

Active

Active

BLOCK DIAGRAM

A4 8

A5 7

A6 6

A7 5

A12 4

A14 3

A16 2

A17 1

A15 31

*

16

15

14

13

12

11

10

9

7

262144 WORDS

X 8 BITS

512 ROWS

X 128 COLUMNS

X 32 BLOCKS

*

21

13 DQ1

22

14 DQ2

23

15 DQ3

25

17 DQ4

26

18 DQ5

27

19 DQ6

28 20 DQ7

29 21 DQ8

A0 12

20

A1 11

19

A2 10

18

A3 9

17

A10 23

31

A11 25

1

A9 26

2

A8 27

3

A13 28

4

CLOCK

GENERATOR

*Pin numbers inside dotted line show those of TSOP.

MITSUBISHI

ELECTRIC

5

29 W

30

22 S1

6

30 S2

32 24 OE

8

32 VCC

(3V)

24

16 GND

(0V)

2

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