M61531FP データシートの表示（PDF） - Renesas Electronics

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M61531FP

6ch Electronic Volume with 10 Input Selectors

Renesas Electronics 

M61531FP

Preliminary

Relationship between Data and Clock

DATA

CLOCK

LA TCH

H

LATCH SIGNAL

D0 D1

D21

D22

D23

D0

L

H

L

H

L

DATA signal is read at the rising edge of CLOCK.

Serial data (D0 – D23) isloaded at the rising edge of the LA TCH signal.

Clock and Data Timings

75%

CLOCK

25%

tr

tWHC

DATA

tcr

tf

tWLC

75%

25%

tSC

25%

LATCH

tr

tf

tSD tHD

tr

tWHC

tf

tSL

75%

25%

Timing Definition of Digital Block

Item

Clock cycle time

Clock pulse width (“H” level)

Clock pulse width (“L” level)

Rising time of clock,data and latch

Falling time of clock,data and latch

Data setup time

Data hold time

Latch setup time

Latch pulse width

Clock setup time

Symbol

tcr

tWHC

tWLC

tr

tf

tSD

tHD

tSL

tWHL

tSC

Min.

4

1.6

1.6

—

—

0.8

0.8

1

1.6

4

Typ.

—

—

—

—

—

—

—

—

—

—

Max.

Unit

—

µs

—

µs

—

µs

0.4

µs

0.4

µs

—

µs

—

µs

—

µs

—

µs

—

µs

Rev.1.1, Jun.01.2004, page 5 of 19

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