M68Z128 データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

M68Z128

5V, 1 Mbit (128Kb x8) Low Power SRAM with Output Enable

STMicroelectronics 

M68Z128

Table 9. Low VCC Data Retention Characteristics

(TA = 0 to 70°C)

Symbol

Parameter

Test Condition

Min

ICCDR Supply Current (Data Retention)

VCC = 3V, E1 ≥ VCC – 0.3V or

E2 ≤ 0.3V, f = 0

VDR Supply Voltage (Data Retention) E1 ≥ VCC – 0.3V or E2 ≤ 0.3V, f = 0

2

tCDR Chip Disable to Power Down

E1 ≥ VCC – 0.3V or E2 ≤ 0.3V, f = 0

0

tER (1) Operation Recovery Time

tAVAV

Note: 1. See Figure 10 for measurement points. Guaranteed but not tested. tAVAV is Read cycle time.

Typ

0.01

Max

2

Unit

µA

V

ns

ns

Figure 10. Low VCC Data Retention AC Waveforms

5V

VCC

3V

VDR > 2.0V

E1 2.2V

E2 0.8V

DATA RETENTION MODE

tCDR

E1 ≥ VDR – 0.3V

E2 ≤ 0.3V

tER

AI00659

9/12

Share Link: