M68Z512NC データシートの表示（PDF） - STMicroelectronics

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M68Z512NC

4 Mbit (512Kb x8) Low Power SRAM with Output Enable

STMicroelectronics 

M68Z512

Table 9. Low VCC Data Retention Characteristics

(TA = 0 to 70°C)

Symbol

Parameter

Test Condition

Min Typ Max Unit

ICCDR (1) Supply Current (Data Retention)

VCC = 3V, E ≥ VCC – 0.3V

0.1

10

µA

VDR Supply Voltage (Data Retention)

E ≥ VCC – 0.3V, f = 0

2

V

tCDR Chip Disable to Power Down

E ≥ VCC – 0.3V, f = 0

0

ns

tER (2) Operation Recovery Time

tAVAV

ns

Note: 1. Typical condition: TA = 25°C.

2. See Figure 10 for measurement points. Guaranteed but not tested. tAVAV is Read cycle time.

Figure 10. Low VCC Data Retention AC Waveforms

5V

VCC

3V

VDR > 2.0V

E 2.2V

DATA RETENTION MODE

tCDR

E ≥ VDR – 0.3V

tER

AI03039

9/12

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